Fix for issue #19, "Picotiny example fails during Place & Route" (#22)

sipeed · Apr 8, 2024 · c3b7957 · c3b7957
1 parent 0f9fe3a
commit c3b7957
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Showing 4 changed files with 62 additions and 12 deletions.
diff --git a/hdmi/impl/project_process_config.json b/hdmi/impl/project_process_config.json
@@ -2,16 +2,28 @@
  "Allow_Duplicate_Modules" : false,
  "Annotated_Properties_for_Analyst" : true,
  "BACKGROUND_PROGRAMMING" : "off",
+ "CMSER" : false,
+ "CMSER_CHECKSUM" : false,
+ "CMSER_MODE" : "auto",
  "COMPRESS" : false,
+ "CPU" : false,
  "CRC_CHECK" : true,
  "Clock_Conversion" : true,
+ "Clock_Route_Order" : 0,
+ "Correct_Hold_Violation" : true,
  "DONE" : false,
  "DOWNLOAD_SPEED" : "default",
  "Default_Enum_Encoding" : "default",
  "Disable_Insert_Pad" : false,
+ "ENABLE_MERGE_MODE" : false,
  "ENCRYPTION_KEY" : false,
  "ENCRYPTION_KEY_TEXT" : "00000000000000000000000000000000",
+ "ERROR_DECTION_AND_CORRECTION" : false,
+ "ERROR_DECTION_ONLY" : false,
+ "ERROR_INJECTION" : false,
+ "EXTERNAL_MASTER_CONFIG_CLOCK" : false,
  "FORMAT" : "binary",
+ "FREQUENCY_DIVIDER" : "",
  "FSM Compiler" : true,
  "Fanout_Guide" : 10000,
  "Frequency" : "Auto",
@@ -21,6 +33,7 @@
  "Generate_Post_PNR_Simulation_Model_File" : false,
  "Generate_Post_Place_File" : false,
  "Generate_SDF_File" : false,
+ "Generate_VHDL_Post_PNR_Simulation_Model_File" : false,
  "GwSyn_Loop_Limit" : 2000,
  "HOTBOOT" : false,
  "I2C" : false,
@@ -34,9 +47,18 @@
  "JTAG" : false,
  "MODE_IO" : false,
  "MSPI" : false,
+ "MSPI_JUMP" : false,
+ "MULTIBOOT_ADDRESS_WIDTH" : "24",
+ "MULTIBOOT_MODE" : "Normal",
+ "MULTIBOOT_SPI_FLASH_ADDRESS" : "00000000",
+ "MULTIJUMP_ADDRESS_WIDTH" : "24",
+ "MULTIJUMP_MODE" : "Normal",
+ "MULTIJUMP_SPI_FLASH_ADDRESS" : "000000",
+ "Multi_Boot" : true,
  "Multiple_File_Compilation_Unit" : true,
  "Number_of_Critical_Paths" : "",
  "Number_of_Start/End_Points" : "",
+ "OSC_DIVIDER" : "8",
  "OUTPUT_BASE_NAME" : "hdmi",
  "POWER_ON_RESET_MONITOR" : true,
  "PRINT_BSRAM_VALUE" : true,
@@ -52,6 +74,7 @@
  "READY" : false,
  "RECONFIG_N" : false,
  "Ram_RW_Check" : true,
+ "Replicate_Resources" : false,
  "Report_Auto-Placed_Io_Information" : false,
  "Resolve_Mixed_Drivers" : false,
  "Resource_Sharing" : true,
@@ -61,22 +84,23 @@
  "Run_Timing_Driven" : true,
  "SECURE_MODE" : false,
  "SECURITY_BIT" : true,
- "SPI_FLASH_ADDR" : "00000000",
  "SSPI" : false,
+ "STOP_CMSER" : false,
  "Show_All_Warnings" : false,
  "Synthesis On/Off Implemented as Translate On/Off" : false,
  "Synthesize_tool" : "GowinSyn",
+ "TclPre" : "",
  "TopModule" : "top",
  "USERCODE" : "default",
  "Unused_Pin" : "As_input_tri_stated_with_pull_up",
  "Update_Compile_Point_Timing_Data" : false,
  "Use_Clock_Period_for_Unconstrainted IO" : false,
- "Use_SCF" : false,
+ "VCCAUX" : 3.3,
+ "VCCX" : "3.3",
  "VHDL_Standard" : "VHDL_Std_1993",
  "Verilog_Standard" : "Vlg_Std_2001",
  "WAKE_UP" : "0",
  "Write_Vendor_Constraint_File" : true,
- "dsp_balance" : false,
  "show_all_warnings" : false,
  "turn_off_bg" : false
 }
diff --git a/picotiny/hw/hdmi/svo_term.v b/picotiny/hw/hdmi/svo_term.v
@@ -98,7 +98,7 @@ module svo_term #(
 
 	always @(posedge clk) begin
 		if (mem_portA_wen) begin
-			mem_portA_rdata <= 'bx;
+//			mem_portA_rdata <= 'bx;
 			mem[mem_portA_addr] <= mem_portA_wdata;
 		end else begin
 			mem_portA_rdata <= mem[mem_portA_addr];

diff --git a/picotiny/project/impl/project_process_config.json b/picotiny/project/impl/project_process_config.json
@@ -2,16 +2,28 @@
  "Allow_Duplicate_Modules" : false,
  "Annotated_Properties_for_Analyst" : true,
  "BACKGROUND_PROGRAMMING" : "off",
+ "CMSER" : false,
+ "CMSER_CHECKSUM" : false,
+ "CMSER_MODE" : "auto",
  "COMPRESS" : false,
+ "CPU" : false,
  "CRC_CHECK" : true,
  "Clock_Conversion" : true,
+ "Clock_Route_Order" : 0,
+ "Correct_Hold_Violation" : true,
  "DONE" : false,
  "DOWNLOAD_SPEED" : "default",
  "Default_Enum_Encoding" : "default",
  "Disable_Insert_Pad" : false,
+ "ENABLE_MERGE_MODE" : false,
  "ENCRYPTION_KEY" : false,
  "ENCRYPTION_KEY_TEXT" : "00000000000000000000000000000000",
+ "ERROR_DECTION_AND_CORRECTION" : false,
+ "ERROR_DECTION_ONLY" : false,
+ "ERROR_INJECTION" : false,
+ "EXTERNAL_MASTER_CONFIG_CLOCK" : false,
  "FORMAT" : "binary",
+ "FREQUENCY_DIVIDER" : "",
  "FSM Compiler" : true,
  "Fanout_Guide" : 10000,
  "Frequency" : "Auto",
@@ -21,6 +33,7 @@
  "Generate_Post_PNR_Simulation_Model_File" : false,
  "Generate_Post_Place_File" : false,
  "Generate_SDF_File" : false,
+ "Generate_VHDL_Post_PNR_Simulation_Model_File" : false,
  "GwSyn_Loop_Limit" : 2000,
  "HOTBOOT" : false,
  "I2C" : false,
@@ -34,9 +47,18 @@
  "JTAG" : false,
  "MODE_IO" : false,
  "MSPI" : false,
+ "MSPI_JUMP" : false,
+ "MULTIBOOT_ADDRESS_WIDTH" : "24",
+ "MULTIBOOT_MODE" : "Normal",
+ "MULTIBOOT_SPI_FLASH_ADDRESS" : "00000000",
+ "MULTIJUMP_ADDRESS_WIDTH" : "24",
+ "MULTIJUMP_MODE" : "Normal",
+ "MULTIJUMP_SPI_FLASH_ADDRESS" : "000000",
+ "Multi_Boot" : true,
  "Multiple_File_Compilation_Unit" : true,
  "Number_of_Critical_Paths" : "",
  "Number_of_Start/End_Points" : "",
+ "OSC_DIVIDER" : "8",
  "OUTPUT_BASE_NAME" : "picotiny",
  "POWER_ON_RESET_MONITOR" : true,
  "PRINT_BSRAM_VALUE" : true,
@@ -52,31 +74,33 @@
  "READY" : false,
  "RECONFIG_N" : false,
  "Ram_RW_Check" : true,
+ "Replicate_Resources" : false,
  "Report_Auto-Placed_Io_Information" : false,
  "Resolve_Mixed_Drivers" : false,
  "Resource_Sharing" : true,
  "Retiming" : false,
- "Route_Maxfan" : "23",
+ "Route_Maxfan" : 23,
  "Route_Option" : "0",
  "Run_Timing_Driven" : true,
  "SECURE_MODE" : false,
  "SECURITY_BIT" : true,
- "SPI_FLASH_ADDR" : "00000000",
  "SSPI" : false,
+ "STOP_CMSER" : false,
  "Show_All_Warnings" : false,
  "Synthesis On/Off Implemented as Translate On/Off" : false,
  "Synthesize_tool" : "GowinSyn",
+ "TclPre" : "",
  "TopModule" : "picotiny",
  "USERCODE" : "default",
  "Unused_Pin" : "As_input_tri_stated_with_pull_up",
  "Update_Compile_Point_Timing_Data" : false,
  "Use_Clock_Period_for_Unconstrainted IO" : false,
- "Use_SCF" : false,
+ "VCCAUX" : 3.3,
+ "VCCX" : "3.3",
  "VHDL_Standard" : "VHDL_Std_1993",
  "Verilog_Standard" : "Vlg_Std_2001",
  "WAKE_UP" : "0",
  "Write_Vendor_Constraint_File" : true,
- "dsp_balance" : false,
  "show_all_warnings" : false,
  "turn_off_bg" : false
 }
diff --git a/picotiny/sw/pico-programmer.py b/picotiny/sw/pico-programmer.py
@@ -83,6 +83,7 @@ def isp_exec_rst(ser):
     lbegin = False
     for line in file:
         # skipping ram space
+        line = line.strip();
         if lbegin:
             lprog.append(line)
             plinecount += 1
@@ -93,7 +94,7 @@ def isp_exec_rst(ser):
     file.close()
 
 
-    nproglen = 16 * (plinecount-1) + len(lprog[plinecount-1].split(' ')) - 1
+    nproglen = 16 * (plinecount-1) + len(lprog[plinecount-1].split(' '))
 
     print("Read program with", nproglen, "bytes")
 
@@ -104,9 +105,10 @@ def isp_exec_rst(ser):
     for i, lstr in enumerate(lprog):
         if lstr.startswith('@'):
             wp = int(lstr[1:], 16) - flash_base
-        for j, bprog in enumerate(lstr.split(' ')[0:-1]):
-            prog[wp] = int(bprog, 16)
-            wp += 1
+        else:
+            for j, bprog in enumerate(lstr.split(' ')):
+                prog[wp] = int(bprog, 16)
+                wp += 1
 
 
     # open serial and check status