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gh-actions: simplify x86 ISA matrix
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mr-c committed Oct 26, 2023
1 parent cd55f2e commit ed72cff
Showing 1 changed file with 11 additions and 16 deletions.
27 changes: 11 additions & 16 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -90,26 +90,21 @@ jobs:
fail-fast: false
matrix:
isax:
- -mavx512bw -mavx512vl -mavx512cd -mavx512dq -mavx512vbmi -mavx512ifma -mavx512vpopcntdq -mavx512bitalg -mavx512vnni -mvpclmulqdq
- -mavx512bw -mavx512vl -DSIMDE_NATURAL_VECTOR_SIZE=256
- -mavx512f
- -mavx512bw
- -mavx512vl
- -mavx512vl -mavx512dq
- -mavx512cd
- -mavx512dq
- -msse2
- -msse3
- -mssse3
- -msse4.1
- -msse4.2
- -mavx
- -mfma
- -mavx2
# https://en.wikipedia.org/wiki/X86-64#Microarchitecture_levels
- -march=x86-64 # CMOV, CX8, FPU, FXSR, MMX, OSFXSR, SCE, SSE, SSE2
- -march=x86-64-v2 # CMPXCHG16B, LAHF-SAHF, POPCNT, SSE3, SSE4_1, SSE4_2, SSSE3
- -march=x86-64-v3 # AVX, AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, OSXSAVE
- -march=x86-64-v4 # AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL a.k.a. skylake+ (including zen4)
- -maes
# - -mpclmul
# See https://github.com/simd-everywhere/simde/issues/1094
include:
- target: tgl
- isax: -mavx512bw -mavx512vl -mavx512cd -mavx512dq -mavx512vbmi -mavx512ifma -mavx512vpopcntdq -mavx512bitalg -mavx512vnni -mvpclmulqdq -mavx512fp16
- isax: -march=x86-64-v4 -mcx16 -mxsave -mpclmul -mfsgsbase -mrdrnd -mhle -mrdseed -maes -mclflushopt -mxsavec -mxsaves -msgx -mpku -msha -mrdpid -mavx512vpopcntdq -mavx512ifma -mavx512vbmi -mavx512vnni -mavx512vbmi2 -mavx512bitalg -mvpclmulqdq -mgfni -mvaes # icelake
target: icl
- isax: -march=x86-64-v4 -mcx16 -mxsave -mpclmul -mfsgsbase -mrdrnd -mhle -mrdseed -maes -mclflushopt -mxsavec -mxsaves -msgx -mpku -msha -mrdpid -mavx512vpopcntdq -mavx512ifma -mavx512vbmi -mavx512vnni -mavx512vbmi2 -mavx512bitalg -mvpclmulqdq -mgfni -mvaes -mpconfig -mwbnoinvd -mclwb -mmovdiri -mmovdir64b -menqcmd -mcldemote -mptwrite -mwaitpkg -mserialize -mtsxldtrk -muintr -mavxnnni -mavx512fp16 # sapphire rapids without bf16
# See https://github.com/simd-everywhere/simde/issues/1095
target: spr
env:
CFLAGS: -Wall -Wextra -Werror ${{ matrix.isax }}
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