wasm simd128/relaxed: begin MIPS implementations

simd-everywhere · Nov 22, 2023 · db8ad84 · db8ad84
1 parent 8cc8874
commit db8ad84
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Showing 2 changed files with 38 additions and 4 deletions.
diff --git a/simde/wasm/relaxed-simd.h b/simde/wasm/relaxed-simd.h
@@ -383,6 +383,8 @@ simde_wasm_f32x4_relaxed_madd (simde_v128_t a, simde_v128_t b, simde_v128_t c) {
       r_.neon_f32 = vmlaq_f32(c_.neon_f32, a_.neon_f32, b_.neon_f32);
     #elif defined(SIMDE_X86_FMA_NATIVE)
       r_.sse_m128 = _mm_fmadd_ps(a_.sse_m128, b_.sse_m128, c_.sse_m128);
+    #elif defined(SIMDE_MIPS_MSA_NATIVE)
+      r_.msa_v4f32 = __msa_fmadd_w(c_.msa_v4f32, a_.msa_v4f32, b_.msa_v4f32);
     #elif defined(SIMDE_VECTOR_SUBSCRIPT)
       r_.f32 = (a_.f32 * b_.f32) + c_.f32;
     #else
@@ -419,6 +421,8 @@ simde_wasm_f64x2_relaxed_madd (simde_v128_t a, simde_v128_t b, simde_v128_t c) {
       r_.neon_f64 = vfmaq_f64(c_.neon_f64, a_.neon_f64, b_.neon_f64);
     #elif defined(SIMDE_X86_FMA_NATIVE)
       r_.sse_m128d = _mm_fmadd_pd(a_.sse_m128d, b_.sse_m128d, c_.sse_m128d);
+    #elif defined(SIMDE_MIPS_MSA_NATIVE)
+      r_.msa_v2f64 = __msa_fmadd_d(c_.msa_v2f64, a_.msa_v2f64, b_.msa_v2f64);
     #elif defined(SIMDE_VECTOR_SUBSCRIPT)
       r_.f64 = (a_.f64 * b_.f64) + c_.f64;
     #else
@@ -459,6 +463,8 @@ simde_wasm_f32x4_relaxed_nmadd (simde_v128_t a, simde_v128_t b, simde_v128_t c)
       r_.neon_f32 = vmlsq_f32(c_.neon_f32, a_.neon_f32, b_.neon_f32);
     #elif defined(SIMDE_X86_FMA_NATIVE)
       r_.sse_m128 = _mm_fnmadd_ps(a_.sse_m128, b_.sse_m128, c_.sse_m128);
+    #elif defined(SIMDE_MIPS_MSA_NATIVE)
+      r_.msa_v4f32 = __msa_fmsub_w(c_.msa_v4f32, a_.msa_v4f32, b_.msa_v4f32);
     #elif defined(SIMDE_VECTOR_SUBSCRIPT)
       r_.f32 = c_.f32 - (a_.f32 * b_.f32);
     #else
@@ -495,6 +501,8 @@ simde_wasm_f64x2_relaxed_nmadd (simde_v128_t a, simde_v128_t b, simde_v128_t c)
       r_.neon_f64 = vfmsq_f64(a_.neon_f64, b_.neon_f64, c_.neon_f64);
     #elif defined(SIMDE_X86_FMA_NATIVE)
       r_.sse_m128d = _mm_fnmadd_pd(a_.sse_m128d, b_.sse_m128d, c_.sse_m128d);
+    #elif defined(SIMDE_MIPS_MSA_NATIVE)
+      r_.msa_v2f64 = __msa_fmsub_d(c_.msa_v2f64, a_.msa_v2f64, b_.msa_v2f64);
     #elif defined(SIMDE_VECTOR_SUBSCRIPT)
       r_.f64 = c_.f64 - (a_.f64 * b_.f64);
     #else

diff --git a/simde/wasm/simd128.h b/simde/wasm/simd128.h
@@ -92,6 +92,17 @@ typedef union {
     #endif
   #elif defined(SIMDE_WASM_SIMD128_NATIVE)
     SIMDE_ALIGN_TO_16 v128_t         wasm_v128;
+  #elif defined(SIMDE_MIPS_MSA_NATIVE)
+    SIMDE_ALIGN_TO_16 v16i8          msa_v16i8;
+    SIMDE_ALIGN_TO_16 v8i16          msa_v8i16;
+    SIMDE_ALIGN_TO_16 v4i32          msa_v4i32;
+    SIMDE_ALIGN_TO_16 v2i64          msa_v2i64;
+    SIMDE_ALIGN_TO_16 v16u8          msa_v16u8;
+    SIMDE_ALIGN_TO_16 v8u16          msa_v8u16;
+    SIMDE_ALIGN_TO_16 v4u32          msa_v4u32;
+    SIMDE_ALIGN_TO_16 v2u64          msa_v2u64;
+    SIMDE_ALIGN_TO_16 v4f32          msa_v4f32;
+    SIMDE_ALIGN_TO_16 v2f64          msa_v2f64;
   #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
     SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned char)      altivec_u8;
     SIMDE_ALIGN_TO_16 SIMDE_POWER_ALTIVEC_VECTOR(unsigned short)     altivec_u16;
@@ -111,13 +122,15 @@ typedef union {
 #if defined(SIMDE_WASM_SIMD128_NATIVE)
   typedef v128_t simde_v128_t;
 #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
-   typedef int32x4_t simde_v128_t;
+  typedef int32x4_t simde_v128_t;
 #elif defined(SIMDE_X86_SSE2_NATIVE)
-   typedef __m128i simde_v128_t;
+  typedef __m128i simde_v128_t;
 #elif defined(SIMDE_X86_SSE_NATIVE)
-   typedef __m128 simde_v128_t;
+  typedef __m128 simde_v128_t;
 #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
-   typedef SIMDE_POWER_ALTIVEC_VECTOR(signed int) simde_v128_t;
+  typedef SIMDE_POWER_ALTIVEC_VECTOR(signed int) simde_v128_t;
+#elif defined(SIMDE_MIPS_MSA_NATIVE)
+  typedef v4i32 simde_v128_t;
 #elif defined(SIMDE_VECTOR_SUBSCRIPT)
   typedef int32_t simde_v128_t SIMDE_ALIGN_TO_16 SIMDE_VECTOR(16) SIMDE_MAY_ALIAS;
 #else
@@ -185,6 +198,19 @@ SIMDE_WASM_SIMD128_GENERATE_CONVERSION_FUNCTIONS(simde_v128_private, simde_v128_
   #endif
 #endif /* defined(SIMDE_ARM_NEON_A32V7_NATIVE) */
 
+#if defined(SIMDE_MIPS_MSA_NATIVE)
+  SIMDE_WASM_SIMD128_GENERATE_CONVERSION_FUNCTIONS(v16i8, simde_v128_t, simde_v128_to_msa_v16i8, simde_v128_from_msa_v16i8)
+  SIMDE_WASM_SIMD128_GENERATE_CONVERSION_FUNCTIONS(v8i16, simde_v128_t, simde_v128_to_msa_v8i16, simde_v128_from_msa_v8i16)
+  SIMDE_WASM_SIMD128_GENERATE_CONVERSION_FUNCTIONS(v4i32, simde_v128_t, simde_v128_to_msa_v4i32, simde_v128_from_msa_v4i32)
+  SIMDE_WASM_SIMD128_GENERATE_CONVERSION_FUNCTIONS(v2i64, simde_v128_t, simde_v128_to_msa_v2i64, simde_v128_from_msa_v2i64)
+  SIMDE_WASM_SIMD128_GENERATE_CONVERSION_FUNCTIONS(v16u8, simde_v128_t, simde_v128_to_msa_v16u8, simde_v128_from_msa_v16u8)
+  SIMDE_WASM_SIMD128_GENERATE_CONVERSION_FUNCTIONS(v8u16, simde_v128_t, simde_v128_to_msa_v8u16, simde_v128_from_msa_v8u16)
+  SIMDE_WASM_SIMD128_GENERATE_CONVERSION_FUNCTIONS(v4u32, simde_v128_t, simde_v128_to_msa_v4u32, simde_v128_from_msa_v4u32)
+  SIMDE_WASM_SIMD128_GENERATE_CONVERSION_FUNCTIONS(v2u64, simde_v128_t, simde_v128_to_msa_v2u64, simde_v128_from_msa_v2u64)
+  SIMDE_WASM_SIMD128_GENERATE_CONVERSION_FUNCTIONS(v4f32, simde_v128_t, simde_v128_to_msa_v4f32, simde_v128_from_msa_v4f32)
+  SIMDE_WASM_SIMD128_GENERATE_CONVERSION_FUNCTIONS(v2f64, simde_v128_t, simde_v128_to_msa_v2f64, simde_v128_from_msa_v2f64)
+#endif
+
 #if defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) || defined(SIMDE_ZARCH_ZVECTOR_13_NATIVE)
   SIMDE_WASM_SIMD128_GENERATE_CONVERSION_FUNCTIONS(SIMDE_POWER_ALTIVEC_VECTOR(  signed  char), simde_v128_t, simde_v128_to_altivec_i8 , simde_v128_from_altivec_i8 )
   SIMDE_WASM_SIMD128_GENERATE_CONVERSION_FUNCTIONS(SIMDE_POWER_ALTIVEC_VECTOR(  signed short), simde_v128_t, simde_v128_to_altivec_i16, simde_v128_from_altivec_i16)