[Fix] Add conditions for fp16 intrinsics

simd-everywhere · Oct 17, 2023 · 675c697 · 675c697
1 parent 36e40d3
commit 675c697
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Showing 80 changed files with 1,381 additions and 894 deletions.
diff --git a/docker/cross-files/i686-gcc-11-qemu.cross b/docker/cross-files/i686-gcc-11-qemu.cross
@@ -9,7 +9,7 @@ exe_wrapper = ['qemu-i386-static', '-L', '/usr/i686-linux-gnu']
 
 [properties]
 c_args = ['-Wextra', '-Werror', '-O2']
-cpp_args = ['-Wextra', '-Werror', '-O2']
+cpp_args = ['-Wextra', '-Werror', '-O2', '-ffloat-store']
 needs_exe_wrapper = true
 
 [host_machine]

diff --git a/simde/arm/neon.h b/simde/arm/neon.h
@@ -31,6 +31,8 @@
 #include "neon/types.h"
 
 #include "neon/aba.h"
+#include "neon/abal.h"
+#include "neon/abal_high.h"
 #include "neon/abd.h"
 #include "neon/abdl.h"
 #include "neon/abs.h"
@@ -48,6 +50,8 @@
 #include "neon/bsl.h"
 #include "neon/cage.h"
 #include "neon/cagt.h"
+#include "neon/cale.h"
+#include "neon/calt.h"
 #include "neon/ceq.h"
 #include "neon/ceqz.h"
 #include "neon/cge.h"

diff --git a/simde/arm/neon/create.h b/simde/arm/neon/create.h
@@ -26,9 +26,6 @@
  *   2023      Yi-Yen Chung <[email protected]> (Copyright owned by Andes Technology)
  */
 
-/* N.B. CM: vcreate_f16 and vcreate_bf16 are omitted as
- * SIMDe has no 16-bit floating point support.
- * Idem for the poly types. */
 /* Yi-Yen Chung: Added vcreate_f16 */
 
 #if !defined(SIMDE_ARM_NEON_CREATE_H)
@@ -157,7 +154,7 @@ simde_vcreate_u64(uint64_t a) {
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float16x4_t
 simde_vcreate_f16(uint64_t a) {
-  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
     return vcreate_f16(a);
   #else
     return simde_vreinterpret_f16_u64(simde_vdup_n_u64(a));

diff --git a/simde/arm/neon/cvt.h b/simde/arm/neon/cvt.h
@@ -141,9 +141,9 @@ simde_vcvt_f64_f32(simde_float32x2_t a) {
 
 SIMDE_FUNCTION_ATTRIBUTES
 int16_t
-simde_x_vcvts_s16_f16(simde_float16 a) {
-  #if defined(SIMDE_FAST_CONVERSION_RANGE) && defined(SIMDE_ARM_NEON_FP16)
-    return HEDLEY_STATIC_CAST(int16_t, a);
+simde_vcvth_s16_f16(simde_float16 a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcvth_s16_f16(a);
   #else
     simde_float32 af = simde_float16_to_float32(a);
     if (HEDLEY_UNLIKELY(af < HEDLEY_STATIC_CAST(simde_float32, INT16_MIN))) {
@@ -157,12 +157,16 @@ simde_x_vcvts_s16_f16(simde_float16 a) {
     }
   #endif
 }
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvth_s16_f16
+  #define vcvth_s16_f16(a) simde_vcvth_s16_f16(a)
+#endif
 
 SIMDE_FUNCTION_ATTRIBUTES
 uint16_t
-simde_x_vcvts_u16_f16(simde_float16 a) {
-  #if defined(SIMDE_FAST_CONVERSION_RANGE)
-    return HEDLEY_STATIC_CAST(uint16_t, simde_float16_to_float32(a));
+simde_vcvth_u16_f16(simde_float16 a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vcvth_u16_f16(a);
   #else
     simde_float32 af = simde_float16_to_float32(a);
     if (HEDLEY_UNLIKELY(af < SIMDE_FLOAT32_C(0.0))) {
@@ -176,6 +180,10 @@ simde_x_vcvts_u16_f16(simde_float16 a) {
     }
   #endif
 }
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcvth_u16_f16
+  #define vcvth_u16_f16(a) simde_vcvth_u16_f16(a)
+#endif
 
 SIMDE_FUNCTION_ATTRIBUTES
 int32_t
@@ -266,7 +274,7 @@ simde_vcvtd_s64_f64(simde_float64 a) {
       return INT64_MIN;
     } else if (HEDLEY_UNLIKELY(a > HEDLEY_STATIC_CAST(simde_float64, INT64_MAX))) {
       return INT64_MAX;
-    } else if (simde_math_isnanf(a)) {
+    } else if (simde_math_isnan(a)) {
       return 0;
     } else {
       return HEDLEY_STATIC_CAST(int64_t, a);
@@ -330,38 +338,6 @@ simde_vcvtd_f64_u64(uint64_t a) {
   #define vcvtd_f64_u64(a) simde_vcvtd_f64_u64(a)
 #endif
 
-SIMDE_FUNCTION_ATTRIBUTES
-simde_float16_t
-simde_vcvth_f16_s16(int16_t a) {
-  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
-    return vcvth_f16_s16(a);
-  #elif SIMDE_FLOAT16_API != SIMDE_FLOAT16_API_PORTABLE && SIMDE_FLOAT16_API != SIMDE_FLOAT16_API_FP16_NO_ABI
-    return HEDLEY_STATIC_CAST(simde_float16_t, a);
-  #else
-    return simde_float16_from_float32(HEDLEY_STATIC_CAST(simde_float32_t, a));
-  #endif
-}
-#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
-  #undef vcvth_f16_s16
-  #define vcvth_f16_s16(a) simde_vcvth_f16_s16(a)
-#endif
-
-SIMDE_FUNCTION_ATTRIBUTES
-simde_float16_t
-simde_vcvth_f16_u16(uint16_t a) {
-  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
-    return vcvth_f16_u16(a);
-  #elif SIMDE_FLOAT16_API != SIMDE_FLOAT16_API_PORTABLE && SIMDE_FLOAT16_API != SIMDE_FLOAT16_API_FP16_NO_ABI
-    return HEDLEY_STATIC_CAST(simde_float16_t, a);
-  #else
-    return simde_float16_from_float32(HEDLEY_STATIC_CAST(simde_float32_t, a));
-  #endif
-}
-#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
-  #undef vcvth_f16_u16
-  #define vcvth_f16_u16(a) simde_vcvth_f16_u16(a)
-#endif
-
 SIMDE_FUNCTION_ATTRIBUTES
 simde_int16x4_t
 simde_vcvt_s16_f16(simde_float16x4_t a) {
@@ -376,7 +352,7 @@ simde_vcvt_s16_f16(simde_float16x4_t a) {
     #else
       SIMDE_VECTORIZE
       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-        r_.values[i] = simde_x_vcvts_s16_f16(a_.values[i]);
+        r_.values[i] = simde_vcvth_s16_f16(a_.values[i]);
       }
     #endif
 
@@ -428,7 +404,7 @@ simde_vcvt_u16_f16(simde_float16x4_t a) {
     #else
       SIMDE_VECTORIZE
       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-        r_.values[i] = simde_x_vcvts_u16_f16(a_.values[i]);
+        r_.values[i] = simde_vcvth_u16_f16(a_.values[i]);
       }
     #endif
 
@@ -533,7 +509,7 @@ simde_vcvtq_s16_f16(simde_float16x8_t a) {
     #else
       SIMDE_VECTORIZE
       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-        r_.values[i] = simde_x_vcvts_s16_f16(a_.values[i]);
+        r_.values[i] = simde_vcvth_s16_f16(a_.values[i]);
       }
     #endif
 
@@ -637,7 +613,7 @@ simde_vcvtq_u16_f16(simde_float16x8_t a) {
     #else
       SIMDE_VECTORIZE
       for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
-        r_.values[i] = simde_x_vcvts_u16_f16(a_.values[i]);
+        r_.values[i] = simde_vcvth_u16_f16(a_.values[i]);
       }
     #endif
 
@@ -1214,7 +1190,7 @@ simde_vcvtas_s32_f32(simde_float32 a) {
     } else if (HEDLEY_UNLIKELY(simde_math_isnanf(a))) {
       return 0;
     } else {
-      return HEDLEY_STATIC_CAST(int32_t, simde_math_round(a));
+      return HEDLEY_STATIC_CAST(int32_t, simde_math_roundf(a));
     }
   #endif
 }
@@ -1237,7 +1213,7 @@ simde_vcvtas_u32_f32(simde_float32 a) {
       return 0;
     } else {
       if(a < 0) return 0;
-      return HEDLEY_STATIC_CAST(int32_t, simde_math_round(a));
+      return HEDLEY_STATIC_CAST(uint32_t, simde_math_roundf(a));
     }
   #endif
 }