Fix issues related to MXCSR register and fix more warnings in test fo…

…r MXCSR register
simd-everywhere · Sep 26, 2023 · 60e016c · 60e016c
1 parent d2dc52a
commit 60e016c
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Showing 2 changed files with 24 additions and 19 deletions.
diff --git a/simde/x86/sse.h b/simde/x86/sse.h
@@ -437,7 +437,7 @@ enum {
 #endif
 
 SIMDE_FUNCTION_ATTRIBUTES
-unsigned int
+uint32_t
 SIMDE_MM_GET_ROUNDING_MODE(void) {
   #if defined(SIMDE_X86_SSE_NATIVE)
     return _MM_GET_ROUNDING_MODE();
@@ -485,7 +485,7 @@ SIMDE_MM_GET_ROUNDING_MODE(void) {
 
 SIMDE_FUNCTION_ATTRIBUTES
 void
-SIMDE_MM_SET_ROUNDING_MODE(unsigned int a) {
+SIMDE_MM_SET_ROUNDING_MODE(uint32_t a) {
   #if defined(SIMDE_X86_SSE_NATIVE)
     _MM_SET_ROUNDING_MODE(a);
   #elif defined(SIMDE_HAVE_FENV_H)
@@ -574,7 +574,7 @@ simde_mm_setcsr (uint32_t a) {
   #if defined(SIMDE_X86_SSE_NATIVE)
     _mm_setcsr(a);
   #else
-    SIMDE_MM_SET_ROUNDING_MODE(HEDLEY_STATIC_CAST(unsigned int, a & SIMDE_MM_ROUND_MASK));
+    SIMDE_MM_SET_ROUNDING_MODE(HEDLEY_STATIC_CAST(uint32_t, a & SIMDE_MM_ROUND_MASK));
   #endif
 }
 #if defined(SIMDE_X86_SSE_ENABLE_NATIVE_ALIASES)

diff --git a/test/x86/sse.c b/test/x86/sse.c
@@ -5772,37 +5772,42 @@ test_simde_MXCSR (SIMDE_MUNIT_TEST_ARGS) {
   uint32_t mask_rm_fzm = SIMDE_MM_ROUND_MASK | SIMDE_MM_FLUSH_ZERO_MASK;
   uint32_t masked_mxcsr = original_mxcsr & ~mask_rm_fzm;
 
+  uint32_t rm_nearest_off, fzm_nearest_off, rm_nearest_on, fzm_nearest_on;
+  uint32_t rm_down_off, fzm_down_off, rm_down_on, fzm_down_on;
+  uint32_t rm_up_off, fzm_up_off, rm_up_on, fzm_up_on;
+  uint32_t rm_zero_off, fzm_zero_off, rm_zero_on, fzm_zero_on;
+
   simde_mm_setcsr(masked_mxcsr | SIMDE_MM_ROUND_NEAREST | SIMDE_MM_FLUSH_ZERO_OFF);
-  uint32_t rm_nearest_off = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_ROUNDING_MODE());
-  uint32_t fzm_nearest_off = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_FLUSH_ZERO_MODE());
+  rm_nearest_off = SIMDE_MM_GET_ROUNDING_MODE();
+  fzm_nearest_off = SIMDE_MM_GET_FLUSH_ZERO_MODE();
 
   simde_mm_setcsr(masked_mxcsr | SIMDE_MM_ROUND_NEAREST | SIMDE_MM_FLUSH_ZERO_ON);
-  uint32_t rm_nearest_on = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_ROUNDING_MODE());
-  uint32_t fzm_nearest_on = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_FLUSH_ZERO_MODE());
+  rm_nearest_on = SIMDE_MM_GET_ROUNDING_MODE();
+  fzm_nearest_on = SIMDE_MM_GET_FLUSH_ZERO_MODE();
 
   simde_mm_setcsr(masked_mxcsr | SIMDE_MM_ROUND_DOWN | SIMDE_MM_FLUSH_ZERO_OFF);
-  uint32_t rm_down_off = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_ROUNDING_MODE());
-  uint32_t fzm_down_off = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_FLUSH_ZERO_MODE());
+  rm_down_off = SIMDE_MM_GET_ROUNDING_MODE();
+  fzm_down_off = SIMDE_MM_GET_FLUSH_ZERO_MODE();
 
   simde_mm_setcsr(masked_mxcsr | SIMDE_MM_ROUND_DOWN | SIMDE_MM_FLUSH_ZERO_ON);
-  uint32_t rm_down_on = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_ROUNDING_MODE());
-  uint32_t fzm_down_on = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_FLUSH_ZERO_MODE());
+  rm_down_on = SIMDE_MM_GET_ROUNDING_MODE();
+  fzm_down_on = SIMDE_MM_GET_FLUSH_ZERO_MODE();
 
   simde_mm_setcsr(masked_mxcsr | SIMDE_MM_ROUND_UP | SIMDE_MM_FLUSH_ZERO_OFF);
-  uint32_t rm_up_off = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_ROUNDING_MODE());
-  uint32_t fzm_up_off = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_FLUSH_ZERO_MODE());
+  rm_up_off = SIMDE_MM_GET_ROUNDING_MODE();
+  fzm_up_off = SIMDE_MM_GET_FLUSH_ZERO_MODE();
 
   simde_mm_setcsr(masked_mxcsr | SIMDE_MM_ROUND_UP | SIMDE_MM_FLUSH_ZERO_ON);
-  uint32_t rm_up_on = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_ROUNDING_MODE());
-  uint32_t fzm_up_on = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_FLUSH_ZERO_MODE());
+  rm_up_on = SIMDE_MM_GET_ROUNDING_MODE();
+  fzm_up_on = SIMDE_MM_GET_FLUSH_ZERO_MODE();
 
   simde_mm_setcsr(masked_mxcsr | SIMDE_MM_ROUND_TOWARD_ZERO | SIMDE_MM_FLUSH_ZERO_OFF);
-  uint32_t rm_zero_off = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_ROUNDING_MODE());
-  uint32_t fzm_zero_off = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_FLUSH_ZERO_MODE());
+  rm_zero_off = SIMDE_MM_GET_ROUNDING_MODE();
+  fzm_zero_off = SIMDE_MM_GET_FLUSH_ZERO_MODE();
 
   simde_mm_setcsr(masked_mxcsr | SIMDE_MM_ROUND_TOWARD_ZERO | SIMDE_MM_FLUSH_ZERO_ON);
-  uint32_t rm_zero_on = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_ROUNDING_MODE());
-  uint32_t fzm_zero_on = HEDLEY_STATIC_CAST(uint32_t, SIMDE_MM_GET_FLUSH_ZERO_MODE());
+  rm_zero_on = SIMDE_MM_GET_ROUNDING_MODE();
+  fzm_zero_on = SIMDE_MM_GET_FLUSH_ZERO_MODE();
 
   simde_mm_setcsr(original_mxcsr);