arc/arm64/imx9: Improve flexspi nor performance

-Increase clock to 133MHz -Enable prefetch Signed-off-by: Jouni Ukkonen <[email protected]>
simbit18 · Nov 7, 2024 · 8c98194 · 8c98194
1 parent a3d1b06
commit 8c98194
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Showing 2 changed files with 13 additions and 11 deletions.
diff --git a/arch/arm64/src/imx9/imx9_flexspi.c b/arch/arm64/src/imx9/imx9_flexspi.c
@@ -561,6 +561,8 @@ void imx9_flexspi_init(struct flexspi_type_s *base,
 
 void imx9_flexspi_get_default_config(struct flexspi_config_s *config)
 {
+  int i;
+
   /* Initializes the configure structure to zero */
 
   memset(config, 0, sizeof(*config));
@@ -588,7 +590,7 @@ void imx9_flexspi_get_default_config(struct flexspi_config_s *config)
    * buffers.
    */
 
-  for (uint8_t i = 0; i < ((uint8_t)FLEXSPI_AHB_BUFFER_COUNT - 2u); i++)
+  for (i = 0; i < (FLEXSPI_AHB_BUFFER_COUNT - 2u); i++)
     {
       /* Default enable AHB prefetch */
 
@@ -605,8 +607,7 @@ void imx9_flexspi_get_default_config(struct flexspi_config_s *config)
       config->ahb_config.buffer[i].buffer_size = 0;
     }
 
-  for (uint8_t i = ((uint8_t)FLEXSPI_AHB_BUFFER_COUNT - 2);
-       i < (uint8_t)FLEXSPI_AHB_BUFFER_COUNT; i++)
+  for (; i < FLEXSPI_AHB_BUFFER_COUNT; i++)
     {
       config->ahb_config.buffer[i].enable_prefetch = true; /* Default enable
                                                             * AHB prefetch.
@@ -618,8 +619,8 @@ void imx9_flexspi_get_default_config(struct flexspi_config_s *config)
     }
 
   config->ahb_config.enable_clear_ahb_buffer_opt  = false;
-  config->ahb_config.enable_read_address_opt      = false;
-  config->ahb_config.enable_ahb_prefetch          = false;
+  config->ahb_config.enable_read_address_opt      = true;
+  config->ahb_config.enable_ahb_prefetch          = true;
   config->ahb_config.enable_ahb_bufferable        = false;
   config->ahb_config.enable_ahb_cachable          = false;
 }
@@ -1235,9 +1236,9 @@ struct flexspi_dev_s *imx9_flexspi_initialize(int intf)
 
   imx9_ccm_gate_on(CCM_LPCG_FLEXSPI1, true);
 
-  /* Configure clock to safe 100MHz, src clock is 800Mhz */
+  /* Configure clock to 133MHz, src clock is 800Mhz */
 
-  imx9_ccm_configure_root_clock(CCM_CR_FLEXSPI1, SYS_PLL1PFD1, 8);
+  imx9_ccm_configure_root_clock(CCM_CR_FLEXSPI1, SYS_PLL1PFD1, 6);
 
   /* Has the FlexSPI hardware been initialized? */
 

diff --git a/arch/arm64/src/imx9/imx9_flexspi_nor.c b/arch/arm64/src/imx9/imx9_flexspi_nor.c
@@ -429,7 +429,7 @@ static int imx9_flexspi_nor_ioctl(struct mtd_dev_s *dev,
 
 static struct flexspi_device_config_s g_flexspi_device_config =
 {
-  .flexspi_root_clk = 100000000,
+  .flexspi_root_clk = 133000000,
   .flash_size = 1024 * 64, /* size in kB */
   .cs_interval_unit = FLEXSPI_CS_INTERVAL_UNIT1_SCK_CYCLE,
   .cs_interval = 0,
@@ -743,9 +743,7 @@ static int imx9_flexspi_nor_page_program(
     .data_size = len,
   };
 
-  up_clean_dcache((uintptr_t)buffer, (uintptr_t)buffer + len);
-
-  stat = FLEXSPI_TRANSFER(dev->flexspi, &transfer);
+    stat = FLEXSPI_TRANSFER(dev->flexspi, &transfer);
   if (stat != 0)
     {
       return -EIO;
@@ -844,6 +842,9 @@ static ssize_t imx9_flexspi_nor_bwrite(struct mtd_dev_s *dev,
 
   int i = 0;
 
+  up_clean_dcache((uintptr_t)src, (uintptr_t)src +
+                  ALIGN_UP(len, ARMV8A_DCACHE_LINESIZE));
+
   finfo("Wstartblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
 
   while (len)