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Add 32-bit support to CapDL initializer #105

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Mar 5, 2024
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Original file line number Diff line number Diff line change
Expand Up @@ -20,8 +20,6 @@ cfg_if::cfg_if! {
}
}

pub type RawConfigWord = u64;

#[derive(Debug, Clone, PartialEq, Eq, PartialOrd, Ord, Hash, Serialize, Deserialize)]
#[serde(transparent)]
pub struct ConfigBadge(RawConfigWord);
Expand All @@ -34,7 +32,7 @@ impl ConfigBadge {

#[derive(Debug, Clone, PartialEq, Eq, PartialOrd, Ord, Hash, Serialize, Deserialize)]
#[serde(transparent)]
pub struct ConfigCPtrBits(u64);
pub struct ConfigCPtrBits(RawConfigWord);

impl ConfigCPtrBits {
pub fn new(word: RawConfigWord) -> Self {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,8 @@
// SPDX-License-Identifier: BSD-2-Clause
//

pub type RawConfigWord = u64;

macro_rules! dummies {
{
$($i:ident)*
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,8 @@ use sel4::{Badge, CPtrBits, Cap, CapType};

use crate::{ConfigBadge, ConfigCPtr, ConfigCPtrBits};

pub type RawConfigWord = sel4::Word;

pub trait WrappedCPtr {
fn wrap(bits: CPtrBits) -> Self;
}
Expand Down
7 changes: 4 additions & 3 deletions crates/private/support/sel4-simple-task/runtime/Cargo.nix
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,6 @@ mk {

inherit (localCrates)
sel4
sel4-backtrace-simple
sel4-dlmalloc
sel4-immediate-sync-once-cell
sel4-panicking
Expand All @@ -25,10 +24,12 @@ mk {
sel4-simple-task-threading
sel4-sync
;

sel4-backtrace = localCrates.sel4-backtrace // { features = [ "unwinding" "postcard" ]; };
sel4-runtime-common = localCrates.sel4-runtime-common // { features = [ "tls" "unwinding" ]; };
};
target."cfg(not(target_arch = \"arm\"))".dependencies = {
sel4-backtrace = localCrates.sel4-backtrace // { features = [ "unwinding" "postcard" ]; };
inherit (localCrates) sel4-backtrace-simple;
};
features = {
serde_json = [
"dep:serde_json"
Expand Down
6 changes: 4 additions & 2 deletions crates/private/support/sel4-simple-task/runtime/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -29,8 +29,6 @@ serde_json = ["dep:serde_json"]
[dependencies]
postcard = { version = "1.0.2", default-features = false }
sel4 = { path = "../../../../sel4" }
sel4-backtrace = { path = "../../../../sel4-backtrace", features = ["unwinding", "postcard"] }
sel4-backtrace-simple = { path = "../../../../sel4-backtrace/simple" }
sel4-dlmalloc = { path = "../../../../sel4-dlmalloc" }
sel4-immediate-sync-once-cell = { path = "../../../../sel4-immediate-sync-once-cell" }
sel4-panicking = { path = "../../../../sel4-panicking" }
Expand All @@ -42,3 +40,7 @@ sel4-simple-task-threading = { path = "../threading" }
sel4-sync = { path = "../../../../sel4-sync" }
serde = { version = "1.0.147", default-features = false }
serde_json = { version = "1.0.87", default-features = false, optional = true }

[target."cfg(not(target_arch = \"arm\"))".dependencies]
sel4-backtrace = { path = "../../../../sel4-backtrace", features = ["unwinding", "postcard"] }
sel4-backtrace-simple = { path = "../../../../sel4-backtrace/simple" }
25 changes: 21 additions & 4 deletions crates/private/support/sel4-simple-task/runtime/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,14 +16,16 @@ use core::ptr;
use core::slice;

use sel4::Endpoint;
use sel4_backtrace_simple::SimpleBacktracing;
use sel4_dlmalloc::StaticHeapBounds;
use sel4_immediate_sync_once_cell::ImmediateSyncOnceCell;
use sel4_panicking::ExternalPanicInfo;
use sel4_panicking_env::{abort, AbortInfo};
use sel4_simple_task_runtime_config_types::RuntimeConfig;
use sel4_simple_task_threading::StaticThread;

#[cfg(not(target_arch = "arm"))]
use sel4_backtrace_simple::SimpleBacktracing;

mod declare_main;
mod termination;

Expand Down Expand Up @@ -79,12 +81,17 @@ pub unsafe extern "C" fn cont_fn(cont_arg: *mut sel4_runtime_common::ContArg) ->

if thread_index == 0 {
CONFIG.set(config.clone()).unwrap();
sel4_runtime_common::set_eh_frame_finder().unwrap();

#[cfg(not(target_arch = "arm"))]
{
sel4_runtime_common::set_eh_frame_finder().unwrap();
}

sel4_panicking::set_hook(&panic_hook);
sel4_runtime_common::run_ctors();
__sel4_simple_task_main(config.arg());
} else {
let endpoint = Endpoint::from_bits(thread_config.endpoint().unwrap());
let endpoint = Endpoint::from_bits(thread_config.endpoint().unwrap().try_into().unwrap());
let reply_authority = {
sel4::sel4_cfg_if! {
if #[sel4_cfg(KERNEL_MCS)] {
Expand All @@ -105,6 +112,8 @@ pub fn try_idle() {
CONFIG
.get()
.and_then(RuntimeConfig::idle_notification)
.map(sel4::CPtrBits::try_from)
.map(Result::unwrap)
.map(sel4::Notification::from_bits)
.map(sel4::Notification::wait);
}
Expand All @@ -128,7 +137,11 @@ sel4_panicking_env::register_debug_put_char!(sel4::debug_put_char);

fn panic_hook(info: &ExternalPanicInfo<'_>) {
debug_println!("{}", info);
get_backtracing().collect_and_send();

#[cfg(not(target_arch = "arm"))]
{
get_backtracing().collect_and_send();
}
}

fn get_static_heap_bounds() -> StaticHeapBounds {
Expand All @@ -144,14 +157,18 @@ fn get_static_heap_mutex_notification() -> sel4::Notification {
.get()
.unwrap()
.static_heap_mutex_notification()
.map(sel4::CPtrBits::try_from)
.map(Result::unwrap)
.map(sel4::Notification::from_bits)
.unwrap()
}

#[cfg(not(target_arch = "arm"))]
pub fn get_backtracing() -> SimpleBacktracing {
SimpleBacktracing::new(get_backtrace_image_identifier())
}

#[allow(dead_code)]
fn get_backtrace_image_identifier() -> Option<&'static str> {
CONFIG.get().unwrap().image_identifier()
}
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -4,29 +4,40 @@
// SPDX-License-Identifier: BSD-2-Clause
//

use sel4::{sel4_cfg, VmAttributes};
use sel4::{sel4_cfg, SizedFrameType};

#[sel4_cfg(any(ARCH_AARCH32, ARCH_AARCH64))]
#[sel4_cfg(any(ARCH_AARCH64, ARCH_AARCH32))]
mod imp {
pub(crate) type FrameType1 = sel4::cap_type::LargePage;
pub(crate) type FrameType2 = sel4::cap_type::HugePage;
use sel4::{cap_type, sel4_cfg};

pub(crate) type PageTableType = sel4::cap_type::PT;

pub(crate) const VSPACE_LEVELS: usize = if sel4::sel4_cfg_bool!(ARCH_AARCH64) {
pub(crate) const NUM_LEVELS: usize = if sel4::sel4_cfg_bool!(ARCH_AARCH64) {
4
} else {
2
};

#[sel4_cfg(ARCH_AARCH64)]
pub(crate) fn level_bits(_level: usize) -> usize {
cap_type::PT::INDEX_BITS
}

#[sel4_cfg(ARCH_AARCH32)]
pub(crate) fn level_bits(level: usize) -> usize {
match level {
0 => cap_type::PD::INDEX_BITS,
1 => cap_type::PT::INDEX_BITS,
_ => unreachable!(),
}
}

pub(crate) fn map_page_table(
vspace: sel4::VSpace,
_level: usize,
vaddr: usize,
cap: sel4::Unspecified,
vm_attributes: sel4::VmAttributes,
) -> sel4::Result<()> {
cap.downcast::<PageTableType>()
cap.downcast::<sel4::cap_type::PT>()
.pt_map(vspace, vaddr, vm_attributes)
}

Expand All @@ -42,14 +53,15 @@ mod imp {
}
}

#[sel4_cfg(any(ARCH_RISCV32, ARCH_RISCV64))]
#[sel4_cfg(any(ARCH_RISCV64, ARCH_RISCV32))]
mod imp {
pub(crate) type FrameType1 = sel4::cap_type::MegaPage;
pub(crate) type FrameType2 = sel4::cap_type::GigaPage;
use sel4::cap_type;

pub(crate) type PageTableType = sel4::cap_type::PageTable;
pub(crate) const NUM_LEVELS: usize = sel4::sel4_cfg_usize!(PT_LEVELS);

pub(crate) const VSPACE_LEVELS: usize = sel4::sel4_cfg_usize!(PT_LEVELS);
pub(crate) fn level_bits(_level: usize) -> usize {
cap_type::PageTable::INDEX_BITS
}

pub(crate) fn map_page_table(
vspace: sel4::VSpace,
Expand All @@ -58,7 +70,7 @@ mod imp {
cap: sel4::Unspecified,
vm_attributes: sel4::VmAttributes,
) -> sel4::Result<()> {
cap.downcast::<PageTableType>()
cap.downcast::<sel4::cap_type::PageTable>()
.page_table_map(vspace, vaddr, vm_attributes)
}

Expand All @@ -76,14 +88,11 @@ mod imp {

#[sel4_cfg(ARCH_X86_64)]
mod imp {
pub(crate) type FrameType1 = sel4::cap_type::LargePage;
pub(crate) type FrameType2 = sel4::cap_type::HugePage;
pub(crate) const NUM_LEVELS: usize = 4;

pub(crate) const VSPACE_LEVELS: usize = if sel4::sel4_cfg_bool!(ARCH_X86_64) {
4
} else {
2
};
pub(crate) fn level_bits(_level: usize) -> usize {
9
}

pub(crate) fn map_page_table(
vspace: sel4::VSpace,
Expand Down Expand Up @@ -122,34 +131,11 @@ mod imp {

pub(crate) use imp::*;

pub(crate) mod frame_types {
use sel4::SizedFrameType;

pub(crate) use super::{FrameType1, FrameType2};

pub(crate) type FrameType0 = sel4::cap_type::Granule;

pub(crate) const FRAME_SIZE_0_BITS: usize = FrameType0::FRAME_SIZE.bits();
pub(crate) const FRAME_SIZE_1_BITS: usize = FrameType1::FRAME_SIZE.bits();
pub(crate) fn step_bits(level: usize) -> usize {
((level + 1)..NUM_LEVELS).map(level_bits).sum::<usize>()
+ sel4::cap_type::Granule::FRAME_SIZE.bits()
}

sel4::sel4_cfg_if! {
if #[sel4_cfg(ARCH_AARCH64)] {
const CACHED: VmAttributes = VmAttributes::PAGE_CACHEABLE;
const UNCACHED: VmAttributes = VmAttributes::DEFAULT;
} else if #[sel4_cfg(ARCH_RISCV64)] {
const CACHED: VmAttributes = VmAttributes::DEFAULT;
const UNCACHED: VmAttributes = VmAttributes::NONE;
} else if #[sel4_cfg(ARCH_X86_64)] {
const CACHED: VmAttributes = VmAttributes::DEFAULT;
const UNCACHED: VmAttributes = VmAttributes::CACHE_DISABLED;
}
}

pub(crate) fn vm_attributes_from_whether_cached(cached: bool) -> VmAttributes {
if cached {
CACHED
} else {
UNCACHED
}
pub(crate) fn span_bits(level: usize) -> usize {
step_bits(level) + level_bits(level)
}
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