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Address clippy lints
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Signed-off-by: Nick Spinale <[email protected]>
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nspin committed Sep 18, 2024
1 parent 9f109cc commit f7877cc
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Showing 15 changed files with 37 additions and 33 deletions.
2 changes: 1 addition & 1 deletion crates/private/tests/root-task/dafny/core/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@ fn main() {
let translated_src = env::var(TRANSLATED_ENV).unwrap();
let out_dir = env::var("OUT_DIR").unwrap();
let translated_dst = PathBuf::from(&out_dir).join("translated.rs");
fs::copy(&translated_src, &translated_dst).unwrap();
fs::copy(&translated_src, translated_dst).unwrap();

println!("cargo:rerun-if-env-changed={TRANSLATED_ENV}");
println!("cargo:rerun-if-changed={}", translated_src);
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Original file line number Diff line number Diff line change
Expand Up @@ -65,7 +65,7 @@ fn with_bit_width<T: object::read::elf::FileHeader<Word: NumCast + PatchValue>>(
image_elf: &object::read::elf::ElfFile<T>,
content: &[u8],
) -> Vec<u8> {
let mut builder = Builder::new(&image_elf).unwrap();
let mut builder = Builder::new(image_elf).unwrap();

builder.discard_p_align(true);

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2 changes: 1 addition & 1 deletion crates/sel4-capdl-initializer/add-spec/src/render_elf.rs
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ impl<'a> RenderElfArgs<'a> {
&self,
orig_elf: &object::read::elf::ElfFile<T>,
) -> Vec<u8> {
let mut builder = Builder::new(&orig_elf).unwrap();
let mut builder = Builder::new(orig_elf).unwrap();

builder.discard_p_align(true);

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19 changes: 10 additions & 9 deletions crates/sel4-generate-target-specs/src/main.rs
Original file line number Diff line number Diff line change
Expand Up @@ -35,6 +35,7 @@ enum Arch {
}

#[derive(Debug, Copy, Clone, PartialEq, Eq)]
#[allow(clippy::upper_case_acronyms)]
enum RiscVArch {
IMAC,
IMAFC,
Expand Down Expand Up @@ -194,15 +195,15 @@ impl Arch {
}

fn all() -> Vec<Self> {
let mut v = vec![];
v.push(Self::AArch64);
v.push(Self::Armv7a);
v.push(Self::RiscV64(RiscVArch::IMAC));
v.push(Self::RiscV64(RiscVArch::GC));
v.push(Self::RiscV32(RiscVArch::IMAC));
v.push(Self::RiscV32(RiscVArch::IMAFC));
v.push(Self::X86_64);
v
vec![
Self::AArch64,
Self::Armv7a,
Self::RiscV64(RiscVArch::IMAC),
Self::RiscV64(RiscVArch::GC),
Self::RiscV32(RiscVArch::IMAC),
Self::RiscV32(RiscVArch::IMAFC),
Self::X86_64,
]
}
}

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2 changes: 1 addition & 1 deletion crates/sel4-kernel-loader/add-payload/src/render_elf.rs
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ where
{
let orig_elf_file = &object::read::elf::ElfFile::<T>::parse(orig_elf_buffer).unwrap();

let mut builder = Builder::new(&orig_elf_file).unwrap();
let mut builder = Builder::new(orig_elf_file).unwrap();

builder.discard_p_align(true);

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2 changes: 1 addition & 1 deletion crates/sel4-microkit/driver-adapters/src/net/driver.rs
Original file line number Diff line number Diff line change
Expand Up @@ -75,7 +75,7 @@ impl<Device: phy::Device + HandleInterrupt + GetNetDeviceMeta> Handler for Handl
self.client_region
.as_mut_ptr()
.index(buf_range)
.copy_from_slice(&rx_buf);
.copy_from_slice(rx_buf);
});

self.rx_ring_buffers
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4 changes: 2 additions & 2 deletions crates/sel4-reset/cli/src/main.rs
Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,7 @@ where

let persistent_section = elf.section_by_name(".persistent");

let mut builder = Builder::empty(&elf);
let mut builder = Builder::empty(elf);

let mut regions_builder = RegionsBuilder::<T>::new();

Expand Down Expand Up @@ -82,7 +82,7 @@ where
}
}

assert!(!(persistent_section.is_some() && !persistent_section_placed));
assert!(persistent_section.is_none() || persistent_section_placed);

let regions = regions_builder.build(endian);

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1 change: 1 addition & 0 deletions crates/sel4-shared-ring-buffer/smoltcp/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -36,6 +36,7 @@ impl<A, R: RawMutex, P: AbstractRcT> Clone for DeviceImpl<A, R, P> {
}

impl<A: AbstractBounceBufferAllocator, R: RawMutex, P: AbstractRcT> DeviceImpl<A, R, P> {
#[allow(clippy::too_many_arguments)]
pub fn new(
raw_mutex: R,
dma_region: ExternallySharedRef<'static, [u8]>,
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8 changes: 4 additions & 4 deletions crates/sel4-synthetic-elf/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,7 @@ impl<'a: 'data, 'data, T: object::read::elf::FileHeader, R: ReadRef<'data>>
base_elf_file: &'a object::read::elf::ElfFile<'data, T, R>,
) -> Result<Self, Box<dyn Error>> {
let mut this = Self::empty(base_elf_file);
this.segments.add_segments_from_phdrs(&this.base_elf_file)?;
this.segments.add_segments_from_phdrs(this.base_elf_file)?;
Ok(this)
}

Expand All @@ -69,12 +69,12 @@ impl<'a: 'data, 'data, T: object::read::elf::FileHeader, R: ReadRef<'data>>
pub fn patch_bytes(&mut self, name: &str, value: Vec<u8>) -> Result<u64, Box<dyn Error>> {
Ok(self
.patches
.add_bytes_via_symbol(&self.base_elf_file, name, value)?)
.add_bytes_via_symbol(self.base_elf_file, name, value)?)
}

pub fn patch(&mut self, name: &str, value: impl PatchValue) -> Result<u64, Box<dyn Error>> {
Ok(self.patches.add_via_symbol(
&self.base_elf_file,
self.base_elf_file,
name,
value,
self.base_elf_file.endian(),
Expand Down Expand Up @@ -111,7 +111,7 @@ impl<'a: 'data, 'data, T: object::read::elf::FileHeader, R: ReadRef<'data>>
pub fn build(&self) -> Result<Vec<u8>, Box<dyn Error>> {
let mut buf = self
.segments
.build_using_ehdr(&self.base_elf_file, self.discard_p_align)?;
.build_using_ehdr(self.base_elf_file, self.discard_p_align)?;
self.patches.apply(&mut buf).unwrap();
Ok(buf)
}
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12 changes: 7 additions & 5 deletions crates/sel4-synthetic-elf/src/patches.rs
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,7 @@ use object::read::ReadRef;
use object::{Endian, File, Object, ObjectSegment, ObjectSymbol};
use thiserror::Error;

#[derive(Default)]
pub struct Patches {
patches: Vec<(u64, Vec<u8>)>,
}
Expand Down Expand Up @@ -74,7 +75,7 @@ impl Patches {
.zip(self.patches.iter().map(|(_vaddr, value)| value))
{
elf_file_data[usize::try_from(*offset_into_file).unwrap()..][..value.len()]
.copy_from_slice(&value);
.copy_from_slice(value);
}

Ok(())
Expand All @@ -92,7 +93,7 @@ impl Patches {
.find_map(|segment| {
let start = segment.address();
let end = start + segment.size();
if (start..end).contains(&vaddr) {
if (start..end).contains(vaddr) {
let offset_in_segment = vaddr - start;
let (file_start, file_size) = segment.file_range();
if offset_in_segment + u64::try_from(value.len()).unwrap() <= file_size
Expand All @@ -102,9 +103,10 @@ impl Patches {
}
None
})
.ok_or_else(|| {
PatchesApplyError::AddrRangeNotMappedWithData(*vaddr, value.len())
})
.ok_or(PatchesApplyError::AddrRangeNotMappedWithData(
*vaddr,
value.len(),
))
})
.collect::<Result<Vec<_>, PatchesApplyError>>()
}
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2 changes: 2 additions & 0 deletions crates/sel4-synthetic-elf/src/segments.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@ use object::read::ReadRef;
use object::{Endian, Endianness, Object};
use thiserror::Error;

#[derive(Default)]
pub struct Segments<'a> {
segments: Vec<Segment<'a>>,
}
Expand Down Expand Up @@ -173,6 +174,7 @@ impl<'a> Segment<'a> {
}
}

#[allow(clippy::enum_variant_names)]
#[derive(Error, Debug)]
pub enum SegmentsError {
ReadError(object::read::Error),
Expand Down
2 changes: 0 additions & 2 deletions crates/sel4/bitfield-parser/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,8 +4,6 @@
// SPDX-License-Identifier: BSD-2-Clause
//

#![allow(clippy::empty_docs)] // for #[derive(Parser)]

use pest::{iterators::Pair, Parser};
use pest_derive::Parser;
use regex::Regex;
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10 changes: 4 additions & 6 deletions crates/sel4/src/arch/arm/invocations.rs
Original file line number Diff line number Diff line change
Expand Up @@ -30,19 +30,17 @@ impl<C: InvocationContext> VCpu<C> {
let res = self.invoke(|cptr, ipc_buffer| {
ipc_buffer
.inner_mut()
.seL4_ARM_VCPU_ReadRegs(cptr.bits(), field.into_sys().into())
.seL4_ARM_VCPU_ReadRegs(cptr.bits(), field.into_sys())
});
Error::or(res.error, res.value)
}

/// Corresponds to `seL4_ARM_VCPU_WriteRegs`.
pub fn vcpu_write_regs(self, field: VCpuReg, value: Word) -> Result<()> {
Error::wrap(self.invoke(|cptr, ipc_buffer| {
ipc_buffer.inner_mut().seL4_ARM_VCPU_WriteRegs(
cptr.bits(),
field.into_sys().into(),
value,
)
ipc_buffer
.inner_mut()
.seL4_ARM_VCPU_WriteRegs(cptr.bits(), field.into_sys(), value)
}))
}

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1 change: 1 addition & 0 deletions crates/sel4/src/error.rs
Original file line number Diff line number Diff line change
Expand Up @@ -68,4 +68,5 @@ impl Error {
}
}

#[allow(clippy::assertions_on_constants)]
const _: () = assert!(sys::seL4_Error::seL4_NumErrors == 11);
1 change: 1 addition & 0 deletions crates/sel4/src/syscalls.rs
Original file line number Diff line number Diff line change
Expand Up @@ -322,4 +322,5 @@ mod fast_messages_sealing {
impl FastMessagesSealed for &[Word] {}
}

#[allow(clippy::assertions_on_constants)]
const _: () = assert!(NUM_FAST_MESSAGE_REGISTERS == 4);

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