crates/sel4-stack: Improve language

Signed-off-by: Nick Spinale <[email protected]>

crates/examples/root-task/example-root-task-without-runtime/src/main.rs

@@ -95,36 +95,36 @@ mod stack {
             Self(UnsafeCell::new([0; N]))
         }
 
-        pub const fn top(&self) -> StackTop {
-            StackTop(self.0.get().cast::<u8>().wrapping_add(N))
+        pub const fn bottom(&self) -> StackBottom {
+            StackBottom(self.0.get().cast::<u8>().wrapping_add(N))
         }
     }
 
     #[repr(transparent)]
-    pub struct StackTop(#[allow(dead_code)] *mut u8);
+    pub struct StackBottom(#[allow(dead_code)] *mut u8);
 
-    unsafe impl Sync for StackTop {}
+    unsafe impl Sync for StackBottom {}
 
     const STACK_SIZE: usize = 0x4000;
 
     static STACK: Stack<STACK_SIZE> = Stack::new();
 
     #[no_mangle]
-    static __stack_top: StackTop = STACK.top();
+    static __stack_bottom: StackBottom = STACK.bottom();
 }
 
 cfg_if::cfg_if! {
     if #[cfg(target_arch = "aarch64")] {
         global_asm! {
             r#"
                 .extern __rust_entry
-                .extern __stack_top
+                .extern __stack_bottom
 
                 .section .text
 
                 .global _start
                 _start:
-                    ldr x9, =__stack_top
+                    ldr x9, =__stack_bottom
                     ldr x9, [x9]
                     mov sp, x9
                     b __rust_entry
@@ -136,13 +136,13 @@ cfg_if::cfg_if! {
             global_asm! {
                 r#"
                     .extern __rust_entry
-                    .extern __stack_top
+                    .extern __stack_bottom
 
                     .section .text
 
                     .global _start
                     _start:
-                        ldr r8, =__stack_top
+                        ldr r8, =__stack_bottom
                         ldr r8, [r8]
                         mov sp, r8
                         b __rust_entry
@@ -155,7 +155,7 @@ cfg_if::cfg_if! {
             () => {
                 r#"
                     .extern __rust_entry
-                    .extern __stack_top
+                    .extern __stack_bottom
 
                     .section .text
 
@@ -169,7 +169,7 @@ cfg_if::cfg_if! {
                         addi gp, gp, %pcrel_lo(1b)
                     .option pop
 
-                        la sp, __stack_top
+                        la sp, __stack_bottom
                         lx sp, (sp)
                         jal __rust_entry
 
@@ -201,13 +201,13 @@ cfg_if::cfg_if! {
         global_asm! {
             r#"
                 .extern __rust_entry
-                .extern __stack_top
+                .extern __stack_bottom
 
                 .section .text
 
                 .global _start
                 _start:
-                    mov rsp, __stack_top
+                    mov rsp, __stack_bottom
                     mov rbp, rsp
                     sub rsp, 0x8 // Stack must be 16-byte aligned before call
                     push rbp

crates/examples/root-task/spawn-thread/src/main.rs

@@ -134,7 +134,7 @@ fn find_largest_kernel_untyped(bootinfo: &sel4::BootInfo) -> sel4::cap::Untyped
 fn create_user_context(f: SecondaryThreadFn) -> sel4::UserContext {
     let mut ctx = sel4::UserContext::default();
 
-    *ctx.sp_mut() = (SECONDARY_THREAD_STACK.top().ptr() as usize)
+    *ctx.sp_mut() = (SECONDARY_THREAD_STACK.bottom().ptr() as usize)
         .try_into()
         .unwrap();
     *ctx.pc_mut() = (secondary_thread_entrypoint as usize).try_into().unwrap();

crates/sel4-kernel-loader/asm/aarch32/head.S

@@ -51,7 +51,7 @@ clearzi:
 
 clearzi_exit:
 
-    ldr     r9, =__primary_stack_top
+    ldr     r9, =__primary_stack_bottom
     ldr     r9, [r9]
     mov     sp, r9
     bl      leave_hyp

crates/sel4-kernel-loader/asm/aarch64/head.S

@@ -36,7 +36,7 @@ clear_bss_loop:
     cmp     x0, x1
     b.lt    clear_bss_loop
 
-    ldr     x9, =__primary_stack_top
+    ldr     x9, =__primary_stack_bottom
     ldr     x9, [x9]
     mov     sp, x9
     bl      init_core_state

crates/sel4-kernel-loader/asm/riscv/head.S

@@ -8,7 +8,7 @@
 #include <kernel/gen_config.h>
 
 .extern __global_pointer$
-.extern __primary_stack_top
+.extern __primary_stack_bottom
 .extern hsm_exists
 .extern next_logical_core_id
 .extern start_core_by_logical_id
@@ -66,7 +66,7 @@ _start:
   mv s2, a1 /* preserve a1 (dtb) in s2 */
 
   /* Attach the stack to sp before calling any C functions */
-  la sp, __primary_stack_top
+  la sp, __primary_stack_bottom
   lx sp, (sp)
 
   /* Check if the Heart State Management (HSM) extension exists, so it can be
@@ -123,7 +123,7 @@ _start1: /* a0 must hold current hard ID passed by bootloader */
   /* This HART may be a different HART to the one that started at _start
    * If we've switched HARTs then the other HART will get a different stack
    * region in secondary_harts. */
-  la sp, __primary_stack_top
+  la sp, __primary_stack_bottom
   lx sp, (sp)
   /* The C code expects the registers to be set up as:
    *   a0 = hart id

crates/sel4-kernel-loader/src/this_image.rs

@@ -53,14 +53,14 @@ pub(crate) mod page_tables {
 
 pub(crate) mod stacks {
     use sel4_config::sel4_cfg_usize;
-    use sel4_stack::{Stack, StackTop};
+    use sel4_stack::{Stack, StackBottom};
 
     const PRIMARY_STACK_SIZE: usize = 4096 * 8; // TODO this is excessive
 
     static PRIMARY_STACK: Stack<PRIMARY_STACK_SIZE> = Stack::new();
 
     #[no_mangle]
-    static __primary_stack_top: StackTop = PRIMARY_STACK.top();
+    static __primary_stack_bottom: StackBottom = PRIMARY_STACK.bottom();
 
     const NUM_SECONDARY_CORES: usize = sel4_cfg_usize!(MAX_NUM_NODES) - 1;
 
@@ -72,6 +72,6 @@ pub(crate) mod stacks {
     #[allow(clippy::zst_offset)] // for case where NUM_SECONDARY_CORES == 0
     pub(crate) fn get_secondary_stack_bottom(core_id: usize) -> usize {
         assert!(core_id > 0 && core_id < sel4_cfg_usize!(MAX_NUM_NODES));
-        SECONDARY_STACKS[core_id - 1].top().ptr() as usize
+        SECONDARY_STACKS[core_id - 1].bottom().ptr() as usize
     }
 }

crates/sel4-reset/src/lib.rs

@@ -12,7 +12,7 @@ use core::slice;
 
 use cfg_if::cfg_if;
 
-use sel4_stack::{Stack, StackTop};
+use sel4_stack::{Stack, StackBottom};
 
 // // //
 
@@ -50,7 +50,7 @@ const STACK_SIZE: usize = 4096;
 static STACK: Stack<STACK_SIZE> = Stack::new();
 
 #[no_mangle]
-static __sel4_reset__stack_top: StackTop = STACK.top();
+static __sel4_reset__stack_bottom: StackBottom = STACK.bottom();
 
 // // //
 
@@ -145,7 +145,7 @@ cfg_if::cfg_if! {
         global_asm! {
             common_asm_prefix!(),
             r#"
-                    ldr x9, =__sel4_reset__stack_top
+                    ldr x9, =__sel4_reset__stack_bottom
                     ldr x9, [x9]
                     mov sp, x9
                     bl __sel4_reset__reset_memory

crates/sel4-runtime-common/src/start.rs

@@ -13,10 +13,10 @@ use core::arch::global_asm;
 macro_rules! declare_stack {
     ($size:expr) => {
         #[no_mangle]
-        static __sel4_runtime_common__stack_top: $crate::_private::start::StackTop = {
+        static __sel4_runtime_common__stack_bottom: $crate::_private::start::StackBottom = {
             static STACK: $crate::_private::start::Stack<{ $size }> =
                 $crate::_private::start::Stack::new();
-            STACK.top()
+            STACK.bottom()
         };
     };
 }
@@ -25,7 +25,7 @@ macro_rules! common_asm_prefix {
     () => {
         r#"
             .extern sel4_runtime_rust_entry
-            .extern __sel4_runtime_common__stack_top
+            .extern __sel4_runtime_common__stack_bottom
 
             .global _start
 
@@ -41,7 +41,7 @@ cfg_if::cfg_if! {
         global_asm! {
             common_asm_prefix!(),
             r#"
-                    ldr x9, =__sel4_runtime_common__stack_top
+                    ldr x9, =__sel4_runtime_common__stack_bottom
                     ldr x9, [x9]
                     mov sp, x9
                     b sel4_runtime_rust_entry
@@ -53,7 +53,7 @@ cfg_if::cfg_if! {
         global_asm! {
             common_asm_prefix!(),
             r#"
-                    ldr r8, =__sel4_runtime_common__stack_top
+                    ldr r8, =__sel4_runtime_common__stack_bottom
                     ldr r8, [r8]
                     mov sp, r8
                     b sel4_runtime_rust_entry
@@ -72,7 +72,7 @@ cfg_if::cfg_if! {
                         addi gp, gp, %pcrel_lo(1b)
                     .option pop
 
-                        la sp, __sel4_runtime_common__stack_top
+                        la sp, __sel4_runtime_common__stack_bottom
                         lx sp, (sp)
                         jal sel4_runtime_rust_entry
 
@@ -106,7 +106,7 @@ cfg_if::cfg_if! {
         global_asm! {
             common_asm_prefix!(),
             r#"
-                    mov rsp, __sel4_runtime_common__stack_top
+                    mov rsp, __sel4_runtime_common__stack_bottom
                     mov rbp, rsp
                     sub rsp, 0x8 // Stack must be 16-byte aligned before call
                     push rbp
@@ -121,5 +121,5 @@ cfg_if::cfg_if! {
 }
 
 pub mod _private {
-    pub use sel4_stack::{Stack, StackTop};
+    pub use sel4_stack::{Stack, StackBottom};
 }

crates/sel4-stack/src/lib.rs

@@ -28,8 +28,8 @@ impl<const N: usize> Stack<N> {
         Self(UnsafeCell::new([0; N]))
     }
 
-    pub const fn top(&self) -> StackTop {
-        StackTop(self.0.get().cast::<u8>().wrapping_add(N))
+    pub const fn bottom(&self) -> StackBottom {
+        StackBottom(self.0.get().cast::<u8>().wrapping_add(N))
     }
 }
 
@@ -40,12 +40,12 @@ impl<const N: usize> Default for Stack<N> {
 }
 
 #[repr(transparent)]
-pub struct StackTop(#[allow(dead_code)] *mut u8);
+pub struct StackBottom(#[allow(dead_code)] *mut u8);
 
-impl StackTop {
+impl StackBottom {
     pub fn ptr(&self) -> *mut u8 {
         self.0
     }
 }
 
-unsafe impl Sync for StackTop {}
+unsafe impl Sync for StackBottom {}