Skip to content

Commit

Permalink
Add support for x86 MSI and IOAPIC IRQs
Browse files Browse the repository at this point in the history
Signed-off-by: Ivan Velickovic <[email protected]>
  • Loading branch information
Ivan-Velickovic committed Feb 20, 2024
1 parent d3341ea commit 01ebf09
Show file tree
Hide file tree
Showing 4 changed files with 127 additions and 3 deletions.
22 changes: 22 additions & 0 deletions crates/sel4-capdl-initializer/core/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -359,6 +359,28 @@ impl<'a, N: ObjectName, D: Content, M: GetEmbeddedFrame, B: BorrowMut<[PerObject
}
}
}
#[sel4_cfg(any(ARCH_IA32, ARCH_X86_64))]
Object::IrqMsi(obj) => {
init_thread::slot::IRQ_CONTROL.cap().irq_control_get_msi(
obj.extra.pci_bus,
obj.extra.pci_dev,
obj.extra.pci_func,
obj.extra.handle,
*irq,
&cslot_to_relative_cptr(slot),
)?;
}
#[sel4_cfg(any(ARCH_IA32, ARCH_X86_64))]
Object::IrqIoapic(obj) => {
init_thread::slot::IRQ_CONTROL.cap().irq_control_get_ioapic(
obj.extra.ioapic,
obj.extra.pin,
obj.extra.level,
obj.extra.polarity,
*irq,
&cslot_to_relative_cptr(slot),
)?;
}
_ => {
panic!();
}
Expand Down
50 changes: 50 additions & 0 deletions crates/sel4-capdl-initializer/types/src/spec.rs
Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,8 @@ pub enum Object<'a, D, M> {
PageTable(object::PageTable<'a>),
AsidPool(object::AsidPool),
ArmIrq(object::ArmIrq<'a>),
IrqMsi(object::IrqMsi<'a>),
IrqIoapic(object::IrqIoapic<'a>),
SchedContext(object::SchedContext),
Reply,
}
Expand Down Expand Up @@ -104,6 +106,8 @@ pub enum Cap {
PageTable(cap::PageTable),
AsidPool(cap::AsidPool),
ArmIrqHandler(cap::ArmIrqHandler),
IrqMSIHandler(cap::IrqMSIHandler),
IrqIOAPICHandler(cap::IrqIOAPICHandler),
SchedContext(cap::SchedContext),
Reply(cap::Reply),
}
Expand All @@ -122,6 +126,8 @@ impl Cap {
Cap::PageTable(cap) => cap.object,
Cap::AsidPool(cap) => cap.object,
Cap::ArmIrqHandler(cap) => cap.object,
Cap::IrqMSIHandler(cap) => cap.object,
Cap::IrqIOAPICHandler(cap) => cap.object,
Cap::SchedContext(cap) => cap.object,
Cap::Reply(cap) => cap.object,
}
Expand Down Expand Up @@ -221,6 +227,38 @@ pub mod object {
pub target: Word,
}

#[derive(Debug, Clone, Eq, PartialEq, IsObject, IsObjectWithCapTable)]
#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
pub struct IrqMsi<'a> {
pub slots: Indirect<'a, [CapTableEntry]>,
pub extra: Indirect<'a, IrqMSIExtraInfo>,
}

#[derive(Debug, Clone, Eq, PartialEq)]
#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
pub struct IrqMSIExtraInfo {
pub handle: Word,
pub pci_bus: Word,
pub pci_dev: Word,
pub pci_func: Word,
}

#[derive(Debug, Clone, Eq, PartialEq, IsObject, IsObjectWithCapTable)]
#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
pub struct IrqIoapic<'a> {
pub slots: Indirect<'a, [CapTableEntry]>,
pub extra: Indirect<'a, IrqIOAPICExtraInfo>,
}

#[derive(Debug, Clone, Eq, PartialEq)]
#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
pub struct IrqIOAPICExtraInfo {
pub ioapic: Word,
pub pin: Word,
pub level: Word,
pub polarity: Word,
}

#[derive(Debug, Clone, Eq, PartialEq, IsObject)]
#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
pub struct SchedContext {
Expand Down Expand Up @@ -319,6 +357,18 @@ pub mod cap {
pub object: ObjectId,
}

#[derive(Debug, Clone, Eq, PartialEq, IsCap)]
#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
pub struct IrqMSIHandler {
pub object: ObjectId,
}

#[derive(Debug, Clone, Eq, PartialEq, IsCap)]
#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
pub struct IrqIOAPICHandler {
pub object: ObjectId,
}

#[derive(Debug, Clone, Eq, PartialEq, IsCap)]
#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
pub struct SchedContext {
Expand Down
2 changes: 2 additions & 0 deletions crates/sel4-capdl-initializer/types/src/traverse.rs
Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,8 @@ impl<'a, N, D, M> Spec<'a, N, D, M> {
Object::PageTable(obj) => Object::PageTable(obj.clone()),
Object::AsidPool(obj) => Object::AsidPool(obj.clone()),
Object::ArmIrq(obj) => Object::ArmIrq(obj.clone()),
Object::IrqMsi(obj) => Object::IrqMsi(obj.clone()),
Object::IrqIoapic(obj) => Object::IrqIoapic(obj.clone()),
Object::SchedContext(obj) => Object::SchedContext(obj.clone()),
Object::Reply => Object::Reply,
},
Expand Down
56 changes: 53 additions & 3 deletions crates/sel4/src/arch/x86/arch/x64/invocations.rs
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,8 @@
//

use crate::{
cap::*, AbsoluteCPtr, Cap, CapRights, Error, FrameType, InvocationContext, Result, VmAttributes,
cap::*, AbsoluteCPtr, Cap, CapRights, Error, FrameType, InvocationContext, Result,
VmAttributes, Word,
};

impl<T: FrameType, C: InvocationContext> Cap<T, C> {
Expand Down Expand Up @@ -91,8 +92,57 @@ impl<C: InvocationContext> PageTable<C> {
}
}

// TODO
impl<C: InvocationContext> IrqControl<C> {}
impl<C: InvocationContext> IrqControl<C> {
/// Corresponds to `seL4_IRQControl_GetIOAPIC`.
pub fn irq_control_get_ioapic(
self,
ioapic: Word,
pin: Word,
level: Word,
polarity: Word,
vector: Word,
dst: &AbsoluteCPtr,
) -> Result<()> {
Error::wrap(self.invoke(|cptr, ipc_buffer| {
ipc_buffer.inner_mut().seL4_IRQControl_GetIOAPIC(
cptr.bits(),
dst.root().bits(),
dst.path().bits(),
dst.path().depth_for_kernel(),
ioapic,
pin,
level,
polarity,
vector,
)
}))
}

/// Corresponds to `seL4_IRQControl_GetMSI`.
pub fn irq_control_get_msi(
self,
pci_bus: Word,
pci_dev: Word,
pci_func: Word,
handle: Word,
vector: Word,
dst: &AbsoluteCPtr,
) -> Result<()> {
Error::wrap(self.invoke(|cptr, ipc_buffer| {
ipc_buffer.inner_mut().seL4_IRQControl_GetMSI(
cptr.bits(),
dst.root().bits(),
dst.path().bits(),
dst.path().depth_for_kernel(),
pci_bus,
pci_dev,
pci_func,
handle,
vector,
)
}))
}
}

impl<C: InvocationContext> AsidControl<C> {
/// Corresponds to `seL4_X86_ASIDControl_MakePool`.
Expand Down

0 comments on commit 01ebf09

Please sign in to comment.