dummy: fix after merge

scroll-tech · Oct 23, 2024 · a602815 · a602815
1 parent 6e298b9
commit a602815
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Showing 3 changed files with 21 additions and 13 deletions.
diff --git a/ceno_zkvm/src/instructions/riscv/dummy/dummy_circuit.rs b/ceno_zkvm/src/instructions/riscv/dummy/dummy_circuit.rs
@@ -54,7 +54,7 @@ pub struct DummyConfig<E: ExtensionField> {
     rs2: Option<(ReadRS2<E>, UInt<E>)>,
     rd: Option<(WriteRD<E>, UInt<E>)>,
 
-    mem_addr_val: Option<(UInt<E>, UInt<E>)>,
+    mem_addr_val: Option<(WitIn, UInt<E>)>,
     mem_read: Option<ReadMEM<E>>,
     mem_write: Option<WriteMEM<E>>,
 
@@ -121,7 +121,7 @@ impl<E: ExtensionField> DummyConfig<E> {
         // Memory
         let mem_addr_val = if with_mem_read || with_mem_write {
             Some((
-                UInt::new_unchecked(|| "mem_addr", circuit_builder)?,
+                circuit_builder.create_witin(|| "mem_addr")?,
                 UInt::new_unchecked(|| "mem_val", circuit_builder)?,
             ))
         } else {
@@ -131,7 +131,7 @@ impl<E: ExtensionField> DummyConfig<E> {
         let mem_read = if with_mem_read {
             Some(ReadMEM::construct_circuit(
                 circuit_builder,
-                mem_addr_val.as_ref().unwrap().0.memory_expr(),
+                mem_addr_val.as_ref().unwrap().0.expr(),
                 mem_addr_val.as_ref().unwrap().1.memory_expr(),
                 vm_state.ts,
             )?)
@@ -142,7 +142,7 @@ impl<E: ExtensionField> DummyConfig<E> {
         let mem_write = if with_mem_write {
             Some(WriteMEM::construct_circuit(
                 circuit_builder,
-                mem_addr_val.as_ref().unwrap().0.memory_expr(),
+                mem_addr_val.as_ref().unwrap().0.expr(),
                 mem_addr_val.as_ref().unwrap().1.memory_expr(),
                 vm_state.ts,
             )?)
@@ -210,7 +210,7 @@ impl<E: ExtensionField> DummyConfig<E> {
         // Memory
         if let Some((mem_addr, mem_val)) = &self.mem_addr_val {
             let mem_op = step.memory_op().expect("memory operation");
-            mem_addr.assign_value(instance, Value::new_unchecked(mem_op.addr));
+            set_val!(instance, mem_addr, u64::from(mem_op.addr));
             mem_val.assign_value(instance, Value::new_unchecked(mem_op.value.after));
         }
         if let Some(mem_read) = &self.mem_read {

diff --git a/ceno_zkvm/src/instructions/riscv/dummy/mod.rs b/ceno_zkvm/src/instructions/riscv/dummy/mod.rs
@@ -5,6 +5,8 @@
 //! Usage:
 //! Specify an instruction with `trait RIVInstruction` and define a `DummyInstruction` like so:
 //!
+//!     use ceno_zkvm::instructions::riscv::{arith::AddOp, dummy::DummyInstruction};
+//!
 //!     type AddDummy<E> = DummyInstruction<E, AddOp>;
 
 mod dummy_circuit;

diff --git a/ceno_zkvm/src/instructions/riscv/dummy/test.rs b/ceno_zkvm/src/instructions/riscv/dummy/test.rs
@@ -1,4 +1,4 @@
-use ceno_emul::{Change, StepRecord};
+use ceno_emul::{Change, InsnKind, StepRecord, encode_rv32};
 use goldilocks::GoldilocksExt2;
 use itertools::Itertools;
 use multilinear_extensions::mle::IntoMLEs;
@@ -10,7 +10,7 @@ use crate::{
         Instruction,
         riscv::{arith::AddOp, branch::BeqOp},
     },
-    scheme::mock_prover::{MOCK_PC_ADD, MOCK_PC_BEQ, MOCK_PROGRAM, MockProver},
+    scheme::mock_prover::{MOCK_PC_START, MockProver},
 };
 
 type AddDummy<E> = DummyInstruction<E, AddOp>;
@@ -31,11 +31,12 @@ fn test_dummy_r() {
         .unwrap()
         .unwrap();
 
-    let (raw_witin, _) = AddDummy::assign_instances(&config, cb.cs.num_witin as usize, vec![
+    let insn_code = encode_rv32(InsnKind::ADD, 2, 3, 4, 0);
+    let (raw_witin, lkm) = AddDummy::assign_instances(&config, cb.cs.num_witin as usize, vec![
         StepRecord::new_r_instruction(
             3,
-            MOCK_PC_ADD,
-            MOCK_PROGRAM[0],
+            MOCK_PC_START,
+            insn_code,
             11,
             0xfffffffe,
             Change::new(0, 11_u32.wrapping_add(0xfffffffe)),
@@ -52,7 +53,9 @@ fn test_dummy_r() {
             .into_iter()
             .map(Into::into)
             .collect_vec(),
+        &[insn_code],
         None,
+        Some(lkm),
     );
 }
 
@@ -71,11 +74,12 @@ fn test_dummy_b() {
         .unwrap()
         .unwrap();
 
-    let (raw_witin, _lkm) = BeqDummy::assign_instances(&config, cb.cs.num_witin as usize, vec![
+    let insn_code = encode_rv32(InsnKind::BEQ, 2, 3, 0, 8);
+    let (raw_witin, lkm) = BeqDummy::assign_instances(&config, cb.cs.num_witin as usize, vec![
         StepRecord::new_b_instruction(
             3,
-            Change::new(MOCK_PC_BEQ, MOCK_PC_BEQ + 8_u32),
-            MOCK_PROGRAM[6],
+            Change::new(MOCK_PC_START, MOCK_PC_START + 8_usize),
+            insn_code,
             0xbead1010,
             0xbead1010,
             0,
@@ -91,6 +95,8 @@ fn test_dummy_b() {
             .into_iter()
             .map(Into::into)
             .collect_vec(),
+        &[insn_code],
         None,
+        Some(lkm),
     );
 }