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riscv: s64ilp32: Support k230 clint & plic which's phy_addr beyond 4GB #4

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merged 1 commit into from
Apr 28, 2024
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riscv: s64ilp32: Support k230 clint & plic which's phy_addr beyond 4GB #4

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1 change: 1 addition & 0 deletions arch/riscv/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -353,6 +353,7 @@ config ARCH_RV64ILP32
depends on NONPORTABLE
select ARCH_SUPPORTS_INT128 if !$(cc-option,$(m64-flag) -D__SIZEOF_INT128__=0)
select 32BIT
select PHYS_ADDR_T_64BIT if !MMU_SV32
select MMU
select VDSO64ILP32
select ARCH_HAS_64ILP32_KERNEL
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8 changes: 6 additions & 2 deletions arch/riscv/include/asm/pgtable.h
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Original file line number Diff line number Diff line change
Expand Up @@ -115,6 +115,10 @@
#define XIP_OFFSET 0
#endif

#ifndef CONFIG_MMU_SV32
#define MAX_POSSIBLE_PHYSMEM_BITS 43
#endif

#ifndef __ASSEMBLY__

#include <asm/page.h>
Expand Down Expand Up @@ -261,7 +265,7 @@ static inline void pmd_clear(pmd_t *pmdp)
set_pmd(pmdp, __pmd(0));
}

static inline pgd_t pfn_pgd(unsigned long pfn, pgprot_t prot)
static inline pgd_t pfn_pgd(phys_addr_t pfn, pgprot_t prot)
{
ptval_t prot_val = pgprot_val(prot);

Expand Down Expand Up @@ -341,7 +345,7 @@ static inline unsigned long pte_pfn(pte_t pte)
#define pte_page(x) pfn_to_page(pte_pfn(x))

/* Constructs a page table entry */
static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)
static inline pte_t pfn_pte(phys_addr_t pfn, pgprot_t prot)
{
ptval_t prot_val = pgprot_val(prot);

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