Merge pull request #1822 from howjmay/typos

fix typos

configure.ac

@@ -1,7 +1,7 @@
 #=========================================================================
 # Toplevel configure.ac for the Modular C++ Build System
 #=========================================================================
-# Please read the documenation in 'mcppbs-doc.txt' for more details on
+# Please read the documentation in 'mcppbs-doc.txt' for more details on
 # how the Modular C++ Build System works. For most new projects, a
 # developer will only need to make the following changes:
 #

fesvr/htif_pthread.h

@@ -13,7 +13,7 @@ class htif_pthread_t : public htif_t
  htif_pthread_t(int argc, char** argv);
  virtual ~htif_pthread_t();
 
- // target inteface
+ // target interface
  void send(const void* buf, size_t size);
  void recv(void* buf, size_t size);
  bool recv_nonblocking(void* buf, size_t size);

riscv/debug_module.cc

@@ -462,9 +462,9 @@ bool debug_module_t::dmi_read(unsigned address, uint32_t *value)
  }
  }
 
- // We don't allow selecting non-existant harts through
+ // We don't allow selecting non-existent harts through
  // hart_array_mask, so the only way it's possible is by writing a
- // non-existant hartsel.
+ // non-existent hartsel.
  dmstatus.anynonexistant = dmcontrol.hartsel >= sim->get_cfg().nprocs();
 
  result = set_field(result, DM_DMSTATUS_IMPEBREAK,

riscv/plic.cc

@@ -55,7 +55,7 @@
 #define PENDING_BASE 0x1000
 
 /*
- * Each hart context has a vector of interupt enable bits associated with it.
+ * Each hart context has a vector of interrupt enable bits associated with it.
  * There's one bit for each interrupt source.
  */
 #define ENABLE_BASE 0x2000

riscv/v_ext_macros.h

@@ -491,7 +491,7 @@ static inline bool is_overlapped_widen(const int astart, int asize,
  BODY; \
  }
 
-// comparision result to masking register
+// comparison result to masking register
 #define VI_LOOP_CMP_BODY(PARAMS, BODY) \
  VI_LOOP_CMP_BASE \
  INSNS_BASE(PARAMS, BODY) \