Update charter based on review comments

charter.adoc

@@ -4,6 +4,6 @@ The RISC-V hardware performance monitoring counters (Zihpm) provide support for
 
 The Performance Events TG will develop a non-ISA extension that includes a set of standard performance events and metrics (or formulas of events). For each standard event, the name and the precise hardware behavior associated with it will be specified, though the event selector value associated with the event will be left up to implementations. For each standard metric, the name, precise description, and event formula, including the names of the constituent events, will be defined.
 
-There could be cases when a microarchitecture decide to not implement a performance event in hardware and provide a metric for it instead. Also from the profiling tools users point of view distinction between events and metrics looks not important – e.g. for them everything can be a metrics whether it is implemented as complex formula or mapped directly to a hardware event. The group will further consider whether some standard events may themselves be counted using event formulas rather than direct hardware events, and what tool improvements may be needed to support such implementations.
+The group will further consider whether some standard events may themselves be counted using event formulas rather than direct hardware events, and what tool improvements may be needed to support such implementations.
 
 The TG will consider whether RISC-V-specific changes are needed to standard JSON file formats used by tools to map event names to event selector encodings, and to map metric names to event formulas. The TG will further prototype the end-to-end solution using Linux perf and QEMU, ensuring that perf can properly translate event and metric names.