Compute kernel naming improvements (#86)

* Added input specific kernel delay

* added indent for compute kernel cycle

* Fixed rewrite rule ordering bug

* New mem naming scheme implemented

* Fixed ordering of ports

* Fixed sparse rom mapping

* metamapper fixes for rv

* Added better naming

* Added better PE names

* Updated rewrite rule naming

* Special case to avoid compiling cgralib

* Fixing bug in rewrite rule naming

* starting working on tests

* Updating pond mapping

* Changing PIPELINED default behaviour

* small bug fix

* Changing to bottom up branch delay matching, not register insertion yet

* working

* Added black box checking

* Added return for print_dag

* Remove extra prints

* Use pono for kernel verification

* Bboxing with pipelined kernels, fully connected bbox formula

* Bipartite style black box formula

* Multiple verification runs for varying black box constraints

* Add code comments

* Remove unnecessary imports

* Rewrite incremental black box formulas

* Cleaning up and fixing middle mult bug

* not working yet

* Unintepreted function optimization working

* Trying to fix cam pipe 2x2

* cleaning up

* Turn off compute mapping verification for now

* Turned back on formal proof

* Added abs to custom IR to fix mapping issue

* Added more complex compute kernel latencies

* Added extra stage of design_top mapping

* Fixing instruction selection for coreir.mux

* fixed casting from bv to float

* adding fp_max

* Added ability to do second compute mapping and fp_max

* Fix issue with regs

* Added fix for naming second stage of mapping muxes

* Small change to compute kernel latency naming

* Small final fix for merge

* Delete .travis.yml

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Co-authored-by: root <[email protected]>
Co-authored-by: Caleb Terrill <[email protected]>
Co-authored-by: yuchen-mei <[email protected]>