jit: Implement fast R/W operations (sysprog21#165)

Considering the modification of memory structure, we need to rewrite the fast R/W operations for JIT code generation. Close sysprog21#164 Co-authored-by: Allen Yen-Fu Chen <[email protected]>
qwe661234 · Aug 14, 2023 · 5208f60 · 5208f60
1 parent 8309dac
commit 5208f60
Show file tree

Hide file tree

Showing 2 changed files with 74 additions and 3 deletions.
diff --git a/src/compile.c b/src/compile.c
@@ -178,7 +178,51 @@ RVOP(bltu, { BRNACH_FUNC(uint32_t, <); })
 
 RVOP(bgeu, { BRNACH_FUNC(uint32_t, >=); })
 
+RVOP(lb, {
+    GEN("  addr = rv->X[%u] + %u;\n", ir->rs1, ir->imm);
+    GEN("  rv->X[%u] = sign_extend_b(* (const uint8_t *) (m->mem_base + "
+        "addr));\n",
+        ir->rd);
+})
+
+RVOP(lh, {
+    GEN("  addr = rv->X[%u] + %u;\n", ir->rs1, ir->imm);
+    GEN("  rv->X[%u] = sign_extend_h(* (const uint16_t *) (m->mem_base + "
+        "addr));\n",
+        ir->rd);
+})
+
+#define MEMORY_FUNC(type, IO)                                                \
+    GEN("  addr = rv->X[%u] + %u;\n", ir->rs1, ir->imm);                     \
+    IIF(IO)                                                                  \
+    (GEN("  rv->X[%u] = * (const %s *) (m->mem_base + addr);\n", ir->rd,     \
+         #type),                                                             \
+     GEN("  *(%s *) (m->mem_base + addr) = (%s) rv->X[%u];\n", #type, #type, \
+         ir->rs2));
+
+RVOP(lw, {MEMORY_FUNC(uint32_t, 1)})
+
+RVOP(lbu, {MEMORY_FUNC(uint8_t, 1)})
+
+RVOP(lhu, {MEMORY_FUNC(uint16_t, 1)})
+
+RVOP(sb, {MEMORY_FUNC(uint8_t, 0)})
+
+RVOP(sh, {MEMORY_FUNC(uint16_t, 0)})
+
+RVOP(sw, {MEMORY_FUNC(uint32_t, 0)})
+
 #if RV32_HAS(EXT_C)
+RVOP(clw, {
+    GEN("  addr = rv->X[%u] + %u;\n", ir->rs1, ir->imm);
+    GEN("  rv->X[%u] = * (const uint32_t *) (m->mem_base + addr);\n", ir->rd);
+})
+
+RVOP(csw, {
+    GEN("  addr = rv->X[%u] + %u;\n", ir->rs1, ir->imm);
+    GEN("  *(uint32_t *) (m->mem_base + addr) = rv->X[%u];\n", ir->rs2);
+})
+
 RVOP(cjal, {
     GEN("  rv->X[1] = rv->PC + %u;\n", ir->insn_len);
     UPDATE_PC(ir->imm);
@@ -229,8 +273,19 @@ RVOP(cbnez, {
         GEN("  return true;\n");
     }
 })
+
+RVOP(clwsp, {
+    GEN("addr = rv->X[rv_reg_sp] + %u;\n", ir->imm);
+    GEN("  rv->X[%u] = * (const uint32_t *) (m->mem_base + addr);\n", ir->rd);
+})
+
+RVOP(cswsp, {
+    GEN("addr = rv->X[rv_reg_sp] + %u;\n", ir->imm);
+    GEN("  *(uint32_t *) (m->mem_base + addr) = rv->X[%u];\n", ir->rs2);
+})
 #endif
 
+
 static void gen_fuse1(riscv_t *rv UNUSED,
                       const rv_insn_t *ir,
                       char *gencode,
@@ -275,7 +330,7 @@ static void gen_fuse3(riscv_t *rv UNUSED,
     opcode_fuse_t *fuse = ir->fuse;
     for (int i = 0; i < ir->imm2; i++) {
         GEN("  addr = rv->X[%u] + %u;\n", fuse[i].rs1, fuse[i].imm);
-        GEN("  rv->io.mem_write_w(addr, rv->X[%u]);\n", fuse[i].rs2);
+        GEN("  *(uint32_t *) (m->mem_base + addr) = rv->X[%u];\n", fuse[i].rs2)
     }
     GEN("  rv->PC += ir->imm2 * ir->insn_len;\n");
     GEN("  ir = ir + ir->imm2;\n");
@@ -294,7 +349,8 @@ static void gen_fuse4(riscv_t *rv UNUSED,
     opcode_fuse_t *fuse = ir->fuse;
     for (int i = 0; i < ir->imm2; i++) {
         GEN("  addr = rv->X[%u] + %u;\n", fuse[i].rs1, fuse[i].imm);
-        GEN("  rv->X[%u] = rv->io.mem_read_w(addr);", fuse[i].rd);
+        GEN("  rv->X[%u] = * (const uint32_t *) (m->mem_base + addr);\n",
+            fuse[i].rd);
     }
     GEN("  rv->PC += ir->imm2 * ir->insn_len;\n");
     GEN("  ir = ir + ir->imm2;\n");

diff --git a/tools/gen-jit-template.py b/tools/gen-jit-template.py
@@ -105,14 +105,27 @@
     "bge",
     "bltu",
     "bgeu",
+    "lb",
+    "lh",
+    "lw",
+    "lbu",
+    "lhu",
+    "sb",
+    "sh",
+    "sw",
+    "clw",
+    "csw",
     "cjal",
     "cj",
     "cbeqz",
     "cbnez",
+    "clwsp",
+    "cswsp",
     "fuse3",
     "fuse4"]
 # check enabled extension in Makefile
 
+
 def parse_argv(EXT_LIST, SKIPLIST):
     for argv in sys.argv:
         if argv.find("RV32_FEATURE_") != -1:
@@ -126,6 +139,7 @@ def parse_argv(EXT_LIST, SKIPLIST):
 def remove_comment(str):
     return re.sub(r'/\*[\s|\S]+?\*/\n', "", str)
 
+
 parse_argv(EXT_LIST, SKIPLIST)
 # prepare PROLOGUE
 output = '''#define PROLOGUE \\
@@ -174,7 +188,8 @@ def remove_comment(str):
 output += "\"a, b, jump_to;\"\\\n"
 output += "\"  int32_t dividend, divisor, res;\"\\\n"
 output += "\"  int64_t multiplicand, multiplier;\"\\\n"
-output += "\"  uint64_t umultiplier;\"\n"
+output += "\"  uint64_t umultiplier;\"\\\n"
+output += "\"  memory_t *m = ((state_t *)rv->userdata)->mem;\"\n"
 
 f = open('src/rv32_template.c', 'r')
 lines = f.read()