Remove insn_len field in IR structure

qwe661234 · Oct 12, 2023 · 0c08a95 · 0c08a95
1 parent ded4044
commit 0c08a95
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Showing 4 changed files with 10 additions and 14 deletions.
diff --git a/src/decode.c b/src/decode.c
@@ -1726,10 +1726,9 @@ bool rv_decode(rv_insn_t *ir, uint32_t insn)
     /* If the last 2-bit is one of 0b00, 0b01, and 0b10, it is
      * a 16-bit instruction.
      */
-    if ((insn & FC_OPCODE) != 3) {
+    if (is_compressed(insn)) {
         insn &= 0x0000FFFF;
         const uint16_t c_index = (insn & FC_FUNC3) >> 11 | (insn & FC_OPCODE);
-        ir->insn_len = INSN_16;
 
         /* decode instruction (compressed instructions) */
         const decode_t op = rvc_jump_table[c_index];
@@ -1740,7 +1739,6 @@ bool rv_decode(rv_insn_t *ir, uint32_t insn)
 
     /* standard uncompressed instruction */
     const uint32_t index = (insn & INSN_6_2) >> 2;
-    ir->insn_len = INSN_32;
 
     /* decode instruction */
     const decode_t op = rv_jump_table[index];

diff --git a/src/decode.h b/src/decode.h
@@ -246,11 +246,6 @@ enum {
 };
 /* clang-format on */
 
-enum {
-    INSN_16 = 2,
-    INSN_32 = 4,
-};
-
 typedef struct {
     int32_t imm;
     uint8_t rd, rs1, rs2;
@@ -275,9 +270,6 @@ typedef struct rv_insn {
 
     uint32_t pc;
 
-    /* instruction length */
-    uint8_t insn_len;
-
     /* Tail-call optimization (TCO) allows a C function to replace a function
      * call to another function or itself, followed by a simple return of the
      * function's result, with a direct jump to the target function. This

diff --git a/src/emulate.c b/src/emulate.c
@@ -61,7 +61,7 @@ enum {
 
 static void rv_exception_default_handler(riscv_t *rv)
 {
-    rv->csr_mepc += rv->compressed ? INSN_16 : INSN_32;
+    rv->csr_mepc += rv->compressed ? 2 : 4;
     rv->PC = rv->csr_mepc; /* mret */
 }
 
@@ -628,14 +628,14 @@ static void block_translate(riscv_t *rv, block_map_t *map, block_t *block)
 
         /* decode the instruction */
         if (!rv_decode(ir, insn)) {
-            rv->compressed = (ir->insn_len == INSN_16);
+            rv->compressed = is_compressed(insn);
             rv_except_illegal_insn(rv, insn);
             break;
         }
         ir->impl = dispatch_table[ir->opcode];
         ir->pc = block->pc_end;
         /* compute the end of pc */
-        block->pc_end += ir->insn_len;
+        block->pc_end += is_compressed(insn) ? 2 : 4;
         block->n_insn++;
         prev_ir = ir;
         /* stop on branch */

diff --git a/src/riscv_private.h b/src/riscv_private.h
@@ -139,3 +139,9 @@ FORCE_INLINE uint32_t sign_extend_b(const uint32_t x)
 {
     return (int32_t) ((int8_t) x);
 }
+
+/* Detect the instruction is RV32C or not */
+FORCE_INLINE bool is_compressed(uint32_t insn)
+{
+    return (insn & FC_OPCODE) != 3;
+}