Merge pull request #419 from lneuhaus/fix-418

Add start_phase to Asg.setup_attributes
pyrpl-fpga · Sep 4, 2020 · d53b829 · d53b829
2 parents c904ad7 + a284f18
commit d53b829
Showing 1 changed file with 2 additions and 1 deletion.
diff --git a/pyrpl/hardware_modules/asg.py b/pyrpl/hardware_modules/asg.py
@@ -114,7 +114,8 @@ class Asg(HardwareModule, SignalModule):
                            "offset",
                            "frequency",
                            "trigger_source",
-                           "output_direct"]
+                           "output_direct",
+                           "start_phase"]
         _setup_attributes = _gui_attributes + ["cycles_per_burst"]
 
         _DATA_OFFSET = set_DATA_OFFSET