misc: Fixups

pulp-platform · Mar 20, 2024 · f508557 · f508557
1 parent e2f2262
commit f508557
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Showing 12 changed files with 68 additions and 38 deletions.
diff --git a/.gitmodules b/.gitmodules
@@ -0,0 +1,3 @@
+[submodule "sw/deps/cva6-sdk"]
+	path = sw/deps/cva6-sdk
+	url = https://github.com/pulp-platform/cva6-sdk.git
diff --git a/Bender.lock b/Bender.lock
@@ -65,10 +65,10 @@ packages:
     - axi
     - common_cells
   axi_obi:
-    revision: 4ca45fa0129d7731ce7d40667882acec45a0f487
+    revision: null
     version: null
     source:
-      Git: git@iis-git.ee.ethz.ch:carfield/axi_obi.git
+      Path: .bender/git/checkouts/safety_island-f408198401cf8b88/future/axi_obi
     dependencies:
     - axi
     - common_cells
@@ -169,8 +169,8 @@ packages:
     dependencies:
     - hci
   common_cells:
-    revision: 13f28aa0021fc22c0d01a12d618fda58d2c93239
-    version: 1.33.0
+    revision: 2bd027cb87eaa9bf7d17196ec5f69864b35b630f
+    version: 1.32.0
     source:
       Git: https://github.com/pulp-platform/common_cells.git
     dependencies:
@@ -265,8 +265,8 @@ packages:
     dependencies:
     - tech_cells_generic
   hwpe-stream:
-    revision: bcb4435f802add732f557dc7fa1c6b5dd8854458
-    version: 1.7.1
+    revision: ddc154424187dff42a8fcec946c768ceb13f13de
+    version: 1.6.4
     source:
       Git: https://github.com/pulp-platform/hwpe-stream.git
     dependencies:
@@ -336,8 +336,8 @@ packages:
     dependencies:
     - common_cells
   obi:
-    revision: 1aa411df145c4ebdd61f8fed4d003c33f7b20636
-    version: 0.1.2
+    revision: d04f1706ba5b7731bbc0a3a085e725e29fcc5b8e
+    version: 0.1.1
     source:
       Git: https://github.com/pulp-platform/obi.git
     dependencies:
@@ -426,8 +426,8 @@ packages:
     - register_interface
     - tech_cells_generic
   register_interface:
-    revision: e25b36670ff7aab3402f40efcc2b11ee0f31cf19
-    version: 0.4.3
+    revision: d7693be4aef1fc7e7eb2b00b41c42e87d959866c
+    version: 0.4.2
     source:
       Git: https://github.com/pulp-platform/register_interface.git
     dependencies:
@@ -452,7 +452,7 @@ packages:
     - common_cells
     - tech_cells_generic
   safety_island:
-    revision: 78b255db3b5fdf9f03db77179b8f5b0de95f3d6c
+    revision: aaef55c798ab53560faaf451a86668fa1e6d0f3b
     version: null
     source:
       Git: https://github.com/pulp-platform/safety_island.git
@@ -480,16 +480,16 @@ packages:
     dependencies:
     - tech_cells_generic
   serial_link:
-    revision: 5a25f5a71074f1ebb6de7b5280f2b16924bcc666
-    version: 1.1.1
+    revision: 77bec1aebd92b2ebea9962814f2370d5d48390c3
+    version: 1.1.0
     source:
       Git: https://github.com/pulp-platform/serial_link.git
     dependencies:
     - axi
     - common_cells
     - register_interface
   spatz:
-    revision: 550ec1d7f4bb49fd86749aabd0e6d3f71b254595
+    revision: 2191fce502191995c2c670f6edb84b9b8370de86
     version: null
     source:
       Git: https://github.com/pulp-platform/spatz.git

diff --git a/Bender.yml b/Bender.yml
@@ -24,7 +24,7 @@ dependencies:
   timer_unit:         { git: https://github.com/pulp-platform/timer_unit.git,           version: 1.0.2                                }
   apb_adv_timer:      { git: https://github.com/pulp-platform/apb_adv_timer.git,        version: 1.0.4                                }
   can_bus:            { git: [email protected]:AlSaqr-platform/can_bus.git,                rev: 0ec0bf8b7dab6d5e4b3f7ec58338a8efee066379 } # branch: pulp
-  spatz:              { git: https://github.com/pulp-platform/spatz.git,                rev: ck/spatz-carfield } # branch: ck/spatz-carfield
+  spatz:              { git: https://github.com/pulp-platform/spatz.git,                rev: 2191fce502191995c2c670f6edb84b9b8370de86 } # branch: aottaviano/spatz-carfield
   common_cells:       { git: https://github.com/pulp-platform/common_cells.git,         version: 1.31.1                               }
   pulp-ethernet:      { git: https://github.com/pulp-platform/pulp-ethernet.git,        rev: bdc8031ab270a49da28df269266ce9ab9a133636 } # branch: carfield
   riscv-dbg:          { git: https://github.com/pulp-platform/riscv-dbg.git,            version: =0.8.0                               }

diff --git a/carfield.mk b/carfield.mk
@@ -44,7 +44,7 @@ include $(CAR_ROOT)/bender-safed.mk
 ######################
 
 CAR_NONFREE_REMOTE ?= [email protected]:carfield/carfield-nonfree.git
-CAR_NONFREE_COMMIT ?= 54ce7e49
+CAR_NONFREE_COMMIT ?= 84923d54
 
 ## @section Carfield platform nonfree components
 ## Clone the non-free verification IP for Carfield. Some components such as CI scripts and ASIC

diff --git a/docs/tg/xilinx.md b/docs/tg/xilinx.md
@@ -60,7 +60,7 @@ See below some typical building time for reference:
 
 | Config                                 | Board  | Duration   |
 |----------------------------------------|--------|------------|
-| carfield_l2dual_pulp_periph            | vcu128 | __ISSUE__  |
+| carfield_l2dual_pulp_periph            | vcu128 | __TODO ADDME__  |
 | carfield_l2dual_safe_periph            | vcu128 | 6h01min    |
 | carfield_l2dual_spatz_periph           | vcu128 | 3h31min    |
 | carfield_l2dual_secure_periph          | vcu128 | __ISSUE__  |
@@ -104,12 +104,13 @@ See the argument list below:
 | GEN_EXT_JTAG    | vcu128    | `0` Connect the JTAG debugger to the board's JTAG (see [vcu128](#xilinx-vcu128)) <br>`1` Connect the JTAG debugger to an external JTAG chain |
 | CARFIELD_CONFIG | all       | Select the Carfield configuration to implement. See below for supported configs.                                                      |
 | VIVADO_MODE     | all       | `batch` Compile in Vivado shell<br>`gui` Compile in Vivado gui                                                                        |
+| XILINX_BOOT_ETH | all       | `0` Boot via SPI flash only (see [booting Linux](#booting_linux)) <br>`1` Boot via SPI flash and Ethernet                             |
 
 See below some typical building time for reference:
 
 | Config                                 | Board  | Duration   |
 |----------------------------------------|--------|------------|
-| carfield_l2dual_pulp_periph            | vcu128 | __ISSUE__  |
+| carfield_l2dual_pulp_periph            | vcu128 | __TODO ADDME__  |
 | carfield_l2dual_safe_periph            | vcu128 | 3h49min    |
 | carfield_l2dual_spatz_periph           | vcu128 | 5h40min    |
 | carfield_l2dual_secure_periph          | vcu128 | __ISSUE__  |
@@ -124,6 +125,10 @@ Note that the `make` command above will first package a Carfield ip before compi
 
 ## Board specificities
 
+### All
+> #### Ethernet
+> As the MAC address of each FPGA is unique (but reconfigurable), if you wish to use the Ethernet
+> IP (`bd` flavor) you will need to add the MAC address of your board in `sw/boot/mac_address.dtsi`.
 ### Xilinx VCU128
 > #### Bootmodes and VIOs
 >
@@ -198,10 +203,6 @@ Tbd
 
 Tbd
 
-### JTAG Preloading
-
-Tbd
-
 ## Booting Linux
 
 To boot Linux, we must load the *OpenSBI* firmware, which takes over M mode and launches the U-boot
@@ -211,8 +212,8 @@ Clone the `carfield` branch of CVA6 SDK at the root of this repository and build
 (OpenSBI + U-boot) and Linux images (*this will take about 30 minutes*):
 
 ```bash
-git clone https://github.com/pulp-platform/cva6-sdk.git --branch carfield
-make -C cva6-sdk images
+git submodule update --init --recursive sw/deps/cva6-sdk
+make -C sw/deps/cva6-sdk images
 ```
 
 In principle, we can boot Linux through JTAG by loading all images into memory, launching OpenSBI,
@@ -227,16 +228,14 @@ To create a full Linux disk image from the ZSL, device tree, firmware, and Linux
 
 ```bash
 # Place the cva6-sdk where they are expected:
-ln -s cva6-sdk/install64 sw/boot/install64
-# Optional: Pre-uild explicitely the image
+ln -s sw/deps/cva6-sdk/install64 sw/boot/install64
+# Optional: Pre-build explicitely the image
 make CAR_ROOT=. sw/boot/linux_carfield_bd_vcu128.gpt.bin
 ```
 
-You can now recompile the board, it should start booting automatically!
-
-### Xilinx VCU128
+### Via SPI flash
 >
-> This board does not offer a SD card reader. We need to load the image in the
+> Boards like VCU128 does not offer a SD card reader. We need to load the image in the
 integrated flash:
 >
 > ```
@@ -248,6 +247,21 @@ integrated flash:
 >
 > This script will erase your bitstream, once the flash has been written (c.a.
 10min) you will need to re-program the bitstream on the board.
+> You can attach the UART port of the FPGA to minicom and see the boot process! 
+### Via Ethernet
+>
+> As flashing and reading the kernel from SPI can take a few minutes, a faster way is to
+> [ask U-Boot to fetch the image from the network](https://www.emcraft.com/som/using-dhcp).
+> This feature can be enabled in the Carfield `bd` flavor. You will need to add the MAC
+> address of your FPGA in `sw/boot/mac_address.dtsi` and the path to your Linux image (on a FTP server)
+> in `sw/boot/remote_boot.dtsi`.
+> You will still need to flash u-boot but it will be now faster:
+> ```
+> make chs-xil-flash VIVADO_MODE=batch XILINX_BOARD=vcu128 XILINX_FLAVOR=bd XILINX_BOOT_ETH=1
+> ```
+### Via Ethernet
+
+Tbd
 
 ## Add your own board
 

diff --git a/sw/boot/carfield.dtsi b/sw/boot/carfield.dtsi
@@ -13,7 +13,6 @@
   chosen {
     stdout-path = "/soc/serial@3002000:38400";
   };
-
   memory@80000000 {
     // Give 1GiB to Linux management
     device_type = "memory";

diff --git a/sw/boot/mac_address.dtsi b/sw/boot/mac_address.dtsi
@@ -1,2 +1,2 @@
 local-mac-address = [ 00 00 00 00 00 00 ];
-mac-address = [ 00 00 00 00 00 00 ];
+mac-address = [ 00 00 00 00 00 00 ];
diff --git a/sw/boot/remote_boot.dtsi b/sw/boot/remote_boot.dtsi
@@ -1 +1,2 @@
-remote-boot = "129.132.24.199:vcu128-01/carfield/uImage";
+// Set the path to your uImage and uncomment use remote boot on carfield_bd_*
+// remote-boot = "0.0.0.0:path_to_your/uImage";
diff --git a/sw/deps/cva6-sdk b/sw/deps/cva6-sdk
diff --git a/sw/sw.mk b/sw/sw.mk
@@ -164,6 +164,7 @@ $(CAR_SW_DIR)/boot/linux_carfield_%.gpt.bin: $(CHS_SW_DIR)/boot/zsl.rom.bin $(CA
 ifneq ($(XILINX_BOOT_ETH),1)
 	dd if=$(word 4,$^) of=$@ bs=512 seek=8192 conv=notrunc
 else
+# If we plan in booting over ethernet do not add Linux
 	truncate -s 4M $@
 endif
 

diff --git a/target/xilinx/constraints/carfield.xdc b/target/xilinx/constraints/carfield.xdc
@@ -47,6 +47,18 @@ set_max_delay -through [get_nets *isolat*] $SOC_TCK
 # Host pwr_on_reset is resynch by the domains
 set_max_delay -datapath -from [get_pins i_host_rstgen/i_rstgen_bypass/synch_regs_q_reg[3]/C] -through [get_pins -of_object [get_cells -hier -filter {REF_NAME==clk_mux_glitch_free || ORIG_REF_NAME==clk_mux_glitch_free}] -filter { NAME =~*async* }] $SOC_TCK
 
+# Reset synchronizers are themselves reset by the host synch reset
+set_max_delay -to [get_pins -of_objects [get_cells -hier -filter {NAME =~ "*i_carfield_rstgen/*/i_rstgen_bypass/synch*"}] -filter {REF_PIN_NAME == CLR}] $SOC_TCK
+set_false_path -hold -to [get_pins -of_objects [get_cells -hier -filter {NAME =~ "*i_carfield_rstgen/*/i_rstgen_bypass/synch*"}] -filter {REF_PIN_NAME == CLR}]
+
+###################
+# Carfield regtop #
+###################
+
+# Most of these paths go through proper synchronizers, but not all of them
+set_max_delay -datapath_only -through [get_cells i_carfield_reg_top] -from [get_clocks -filter {NAME !~ "*clk_50*"}] -to [get_clocks *clk_50*] $SOC_TCK
+set_max_delay -datapath_only -through [get_cells i_carfield_reg_top] -from [get_clocks *clk_50*] -to [get_clocks -filter {NAME !~ "*clk_50*"}] $SOC_TCK
+
 #################
 # Carfield CDCs #
 #################

diff --git a/target/xilinx/xilinx.mk b/target/xilinx/xilinx.mk
@@ -18,11 +18,10 @@ XILINX_FLAVOR  ?= bd
 # Board in {vcu128}
 XILINX_BOARD   ?= vcu128
 
-XILINX_PORT       ?=
-XILINX_FPGA_PATH  ?=
-XILINX_HOST       ?=
-XILINX_MAC_ADDR   ?=
-XILINX_BOOT_ETH   ?=
+XILINX_PORT       ?= 3121
+XILINX_FPGA_PATH  ?= xilinx_tcf/Xilinx/*
+XILINX_HOST       ?= localhost
+XILINX_BOOT_ETH   ?= 0
 
 ifeq ($(XILINX_BOARD),vcu128)
 	xilinx_part       := xcvu37p-fsvh2892-2L-e