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Merge pull request #97 from pulp-platform/chi/l2_ecc_mgr
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Integrate ECC manager for L2 memory
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@alex96295
alex96295 authored Jul 21, 2023
2 parents 682d0c8 + 29ccf93 commit 47427bc
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Showing 4 changed files with 46 additions and 36 deletions.
2 changes: 1 addition & 1 deletion Bender.lock
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Expand Up @@ -121,7 +121,7 @@ packages:
Git: [email protected]:AlSaqr-platform/can_bus.git
dependencies: []
car_l2:
revision: 4239b2a510d65aa110bcc8a070e434cabd1a8b9a
revision: d6ab486b2777bf78c38b49352b5977565a272a58
version: null
source:
Git: [email protected]:carfield/carfield_l2_mem.git
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2 changes: 1 addition & 1 deletion Bender.yml
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Expand Up @@ -14,7 +14,7 @@ dependencies:
axi: { git: https://github.com/pulp-platform/axi.git, version: 0.39.0-beta.10 }
cheshire: { git: https://github.com/pulp-platform/cheshire.git, rev: 31f30657937b3a50b761298289be68e613182d54 } # branch: michaero/carfield
hyperbus: { git: https://github.com/pulp-platform/hyperbus.git, rev: 2adb7271438cdb96c19fbaf3e2a6bf89ffeee568 } # branch: lv/phys_in_use
car_l2: { git: [email protected]:carfield/carfield_l2_mem.git, rev: 4239b2a510d65aa110bcc8a070e434cabd1a8b9a } # branch: main
car_l2: { git: [email protected]:carfield/carfield_l2_mem.git, rev: d6ab486b2777bf78c38b49352b5977565a272a58 } # branch: main
safety_island: { git: [email protected]:carfield/safety-island.git, rev: 382bc52d437c578cb68e4f5dcd1db291b3325001 } # branch: param_banks
pulp_cluster: { git: https://github.com/pulp-platform/pulp_cluster.git, rev: adcdb725c916fbca7d3e4657f9a41c4f1fb482b6 } # branch: ck/carfield-1
opentitan: { git: https://github.com/alsaqr-platform/opentitan.git, rev: 5ce64a6225e971c1e00ece29aa485f23a31aa7b2 } # branch: carfield
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43 changes: 9 additions & 34 deletions hw/carfield.sv
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Expand Up @@ -1149,7 +1149,9 @@ l2_wrap #(
.L2MaxWriteTxns ( Cfg.LlcMaxWriteTxns ),
.AxiUserAmoMsb ( Cfg.AxiUserAmoMsb ),
.AxiUserAmoLsb ( Cfg.AxiUserAmoLsb ),
.L2AmoNumCuts ( Cfg.LlcAmoNumCuts )
.L2AmoNumCuts ( Cfg.LlcAmoNumCuts ),
.l2_ecc_reg_req_t ( carfield_reg_req_t ),
.l2_ecc_reg_rsp_t ( carfield_reg_rsp_t )
) i_reconfigurable_l2 (
.clk_i ( l2_clk ),
.rst_ni ( l2_rst_n ),
Expand All @@ -1169,42 +1171,15 @@ l2_wrap #(
.slvport_w_data_i ( axi_slv_ext_w_data [NumL2Ports-1:0] ),
.slvport_w_wptr_i ( axi_slv_ext_w_wptr [NumL2Ports-1:0] ),
.slvport_w_rptr_o ( axi_slv_ext_w_rptr [NumL2Ports-1:0] ),
.l2_ecc_reg_async_mst_req_i ( ext_reg_async_slv_req_out [L2EccIdx-NumSyncRegIdx] ),
.l2_ecc_reg_async_mst_ack_o ( ext_reg_async_slv_ack_in [L2EccIdx-NumSyncRegIdx] ),
.l2_ecc_reg_async_mst_data_i ( ext_reg_async_slv_data_out[L2EccIdx-NumSyncRegIdx] ),
.l2_ecc_reg_async_mst_req_o ( ext_reg_async_slv_req_in [L2EccIdx-NumSyncRegIdx] ),
.l2_ecc_reg_async_mst_ack_i ( ext_reg_async_slv_ack_out [L2EccIdx-NumSyncRegIdx] ),
.l2_ecc_reg_async_mst_data_o ( ext_reg_async_slv_data_in [L2EccIdx-NumSyncRegIdx] ),
.ecc_error_o ( l2_ecc_err )
);

// Todo connect regs to L2, move cdc into L2
carfield_reg_req_t l2_reg_req;
carfield_reg_rsp_t l2_reg_rsp;
reg_cdc_dst #(
.req_t (carfield_reg_req_t),
.rsp_t (carfield_reg_rsp_t),
.CDC_KIND("cdc_4phase")
) i_l2_reg_cdc_dst (
.dst_clk_i (l2_clk),
.dst_rst_ni (l2_rst_n),

.dst_req_o (l2_reg_req),
.dst_rsp_i (l2_reg_rsp),

.async_req_i ( ext_reg_async_slv_req_out [L2EccIdx-NumSyncRegIdx]),
.async_ack_o ( ext_reg_async_slv_ack_in [L2EccIdx-NumSyncRegIdx]),
.async_data_i( ext_reg_async_slv_data_out [L2EccIdx-NumSyncRegIdx]),

.async_req_o ( ext_reg_async_slv_req_in [L2EccIdx-NumSyncRegIdx]),
.async_ack_i ( ext_reg_async_slv_ack_out [L2EccIdx-NumSyncRegIdx]),
.async_data_o( ext_reg_async_slv_data_in [L2EccIdx-NumSyncRegIdx])
);

reg_err_slv #(
.DW (32),
.ERR_VAL(32'hBADCAB1E),
.req_t (carfield_reg_req_t),
.rsp_t (carfield_reg_rsp_t)
) i_l2_reg_err (
.req_i(l2_reg_req),
.rsp_o(l2_reg_rsp)
);

// Safety Island
logic [SafetyIslandCfg.NumInterrupts-1:0] safed_intrs;

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35 changes: 35 additions & 0 deletions hw/l2_wrap.sv
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Expand Up @@ -24,6 +24,9 @@ module l2_wrap
parameter int unsigned AxiUserAmoMsb = 1,
parameter int unsigned AxiUserAmoLsb = 0,
parameter int unsigned L2AmoNumCuts = 1,
/// ECC Reg Bus
parameter type l2_ecc_reg_req_t = logic,
parameter type l2_ecc_reg_rsp_t = logic,
/// Mapping rules
parameter int unsigned NumRules = car_l2_pkg::NUM_MAP_TYPES * NumPort,
/// L2 Memory settings
Expand Down Expand Up @@ -68,6 +71,12 @@ module l2_wrap
input logic [NumPort-1:0][ WWidth-1:0] slvport_w_data_i ,
input logic [NumPort-1:0][ LogDepth:0] slvport_w_wptr_i ,
output logic [NumPort-1:0][ LogDepth:0] slvport_w_rptr_o ,
input logic l2_ecc_reg_async_mst_req_i,
output logic l2_ecc_reg_async_mst_ack_o,
input l2_ecc_reg_req_t l2_ecc_reg_async_mst_data_i,
output logic l2_ecc_reg_async_mst_req_o,
input logic l2_ecc_reg_async_mst_ack_i,
output l2_ecc_reg_rsp_t l2_ecc_reg_async_mst_data_o,
output logic ecc_error_o
);

Expand Down Expand Up @@ -113,6 +122,28 @@ for (genvar i = 0; i < NumPort; i++) begin: gen_cdc_fifos
);
end

l2_ecc_reg_req_t l2_ecc_reg_req;
l2_ecc_reg_rsp_t l2_ecc_reg_rsp;

reg_cdc_dst #(
.CDC_KIND ( "cdc_4phase" ),
.req_t ( l2_ecc_reg_req_t ),
.rsp_t ( l2_ecc_reg_rsp_t )
) i_reg_cdc_dst (
.dst_clk_i ( clk_i ),
.dst_rst_ni ( pwr_on_rst_ni ),
.dst_req_o ( l2_ecc_reg_req ),
.dst_rsp_i ( l2_ecc_reg_rsp ),

.async_req_i ( l2_ecc_reg_async_mst_req_i ),
.async_ack_o ( l2_ecc_reg_async_mst_ack_o ),
.async_data_i( l2_ecc_reg_async_mst_data_i ),

.async_req_o ( l2_ecc_reg_async_mst_req_o ),
.async_ack_i ( l2_ecc_reg_async_mst_ack_i ),
.async_data_o( l2_ecc_reg_async_mst_data_o )
);

typedef struct packed {
int unsigned idx;
logic [AxiAddrWidth-1:0] start_addr;
Expand Down Expand Up @@ -150,6 +181,8 @@ car_l2_top #(
.ATM_USER_ID_LSB ( AxiUserAmoLsb ),
.ATM_RISCV_WORD ( 64 ),
.ATM_NUM_CUTS ( L2AmoNumCuts ),
.l2_ecc_reg_req_t ( l2_ecc_reg_req_t),
.l2_ecc_reg_rsp_t ( l2_ecc_reg_rsp_t),
.axi_req_t ( axi_async_req_t ),
.axi_resp_t ( axi_async_rsp_t )
) i_l2_top (
Expand All @@ -158,6 +191,8 @@ car_l2_top #(
.mapping_rules_i ( MappingRules ),
.axi_req_i ( axi_async_req ),
.axi_resp_o ( axi_async_rsp ),
.l2_ecc_reg_req_i ( l2_ecc_reg_req ),
.l2_ecc_reg_rsp_o ( l2_ecc_reg_rsp ),
.ecc_error_o ( ecc_error_o )
);

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