Copied TB from Carfield's intel16 repo, updated Bender and simulation…

… script
pulp-platform · Apr 17, 2024 · a900183 · a900183
1 parent 9bbf90a
commit a900183
Show file tree

Hide file tree

Showing 5 changed files with 2,210 additions and 2 deletions.
diff --git a/Bender.yml b/Bender.yml
@@ -18,7 +18,7 @@ dependencies:
   dyn_mem:                 { git: https://github.com/pulp-platform/dyn_spm.git,              rev: 480590062742230dc9bd4050358a15b4747bdf34 } # branch: main
   safety_island:           { git: https://github.com/pulp-platform/safety_island.git,        rev: aaef55c798ab53560faaf451a86668fa1e6d0f3b } # branch: carfield
   pulp_cluster:            { git: https://github.com/pulp-platform/pulp_cluster.git,         rev: 3cd3e83fdd7a791e8ae54aef39423004581c8a48 } # branch: astral
-  opentitan:               { git: https://github.com/pulp-platform/opentitan.git,            rev: 3fc11c14f29a161054766fabd95f90ab2a9e473a } # branch: mc/astral
+  opentitan:               { git: https://github.com/pulp-platform/opentitan.git,            rev: f1bd0be4dfd77982d99db15c0cd21aae70e8dbb3 } # branch: mc/astral
   mailbox_unit:            { git: https://github.com/pulp-platform/mailbox_unit.git,         version: 1.1.0                                }
   apb:                     { git: https://github.com/pulp-platform/apb.git,                  version: 0.2.3                                }
   timer_unit:              { git: https://github.com/pulp-platform/timer_unit.git,           version: 1.0.2                                }
@@ -77,6 +77,7 @@ sources:
   # levels 1 and 0, etc. Files within a level are ordered alphabetically.
   # Level 0
   - hw/carfield_pkg.sv
+  - hw/carfield_chip_pkg.sv
   - hw/regs/carfield_reg_pkg.sv
   - hw/regs/carfield_reg_top.sv
   # Level 1
@@ -97,6 +98,8 @@ sources:
       - target/sim/src/vip_carfield_soc.sv
       - target/sim/src/carfield_fix.sv
       - target/sim/src/carfield_tb.sv
+      - target/sim/src/carfield_synth_fix.sv
+      - target/sim/src/carfield_synth_tb.sv
 
   - target: spyglass
     files:

diff --git a/hw/carfield_chip_pkg.sv b/hw/carfield_chip_pkg.sv
@@ -0,0 +1,30 @@
+// Copyright 2023 ETH Zurich and University of Bologna.
+// Solderpad Hardware License, Version 0.51, see LICENSE for details.
+// SPDX-License-Identifier: SHL-0.51
+//
+// Alessandro Ottaviano <[email protected]>
+
+`include "cheshire/typedef.svh"
+
+/// Carfield chip specific parameters
+package carfield_chip_pkg;
+
+// import pll_digital_pkg::*;
+
+// localparam int unsigned NumPlls = pll_digital_pkg::NPLLs;
+
+typedef enum int {
+  HostDomainClkIdx   = 'd0,
+  PeriphDomainClkIdx = 'd1,
+  AltDomainClkIdx    = 'd2
+} carfield_clocks_e;
+
+// PULP Platform manufacturer and default Carfield Pll part number
+// JTAG ID code:
+// LSB                        [0]:     1'h1
+// PULP Platform Manufacturer [11:1]:  11'h6d9
+// Part Number                [27:12]: 16'habc0 --> TBD!
+// Version                    [31:28]: 4'h1
+localparam int unsigned CarfieldPllJtagIdCode = 32'h1_abc0_db3;
+
+endpackage
diff --git a/target/sim/sim.mk b/target/sim/sim.mk
@@ -7,7 +7,8 @@
 ## @section Carfield platform simulation
 
 QUESTA ?= questa-2023.4
-TBENCH ?= tb_carfield_soc
+#TBENCH ?= tb_carfield_soc
+TBENCH ?= tb_carfield_chip
 
 ## Get HyperRAM verification IP (VIP) for simulation
 $(CAR_TGT_DIR)/sim/src/hyp_vip: