Fix configurable top level bugs and integrate CI flow. (#2)

* Bump dependencies and align testbench with new Cheshire JTAG tasks. * Fix connections. * Align cache-enable CSR with OpenHW recent changes... * Add draft CI flow. * Use normal printf in `Helloworld`. * Update nonfree rules. * Fix parameter declaration in L2 Ecc asyncronoys buses. * Fix PULP cluster EOC and busy enable connections. * Update nonfree. * Bump nonfree. * Bump nonfree to copy uImage in dedicated `astral` folder. * Apply suggestions from code review Co-authored-by: Michael Rogenmoser <[email protected]> --------- Co-authored-by: Yvan Tortorella <[email protected]> Co-authored-by: Michael Rogenmoser <[email protected]>
pulp-platform · May 27, 2024 · 4c563a2 · 4c563a2
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diff --git a/.github/workflows/gitlab-ci.yml b/.github/workflows/gitlab-ci.yml
@@ -16,6 +16,6 @@ jobs:
         uses: pulp-platform/pulp-actions/gitlab-ci@v1
         with:
           domain: iis-git.ee.ethz.ch
-          repo: github-mirror/carfield
+          repo: github-mirror/astral
           token: ${{ secrets.GITLAB_TOKEN }}
           poll-count: 2160
diff --git a/Bender.local b/Bender.local
@@ -6,7 +6,6 @@ overrides:
   axi:                  { git: https://github.com/pulp-platform/axi.git                   , version: 0.39.1 }
   axi_riscv_atomics:    { git: https://github.com/pulp-platform/axi_riscv_atomics.git     , version: 0.8.2 }
   apb:                  { git: "https://github.com/pulp-platform/apb.git"                 , version: 0.2.3 }
-  register_interface:   { git: "https://github.com/pulp-platform/register_interface.git"  , rev: "e4b20be8833180863ebc64675c93b1694239c505" } # branch: astral
   redundancy_cells:     { git: "https://github.com/pulp-platform/redundancy_cells.git"    , rev: "c37bdb47339bf70e8323de8df14ea8bbeafb6583" } # branch: astral-rebase
   hci:                  { git: "https://github.com/pulp-platform/hci.git"                 , rev: v1.1 }
   tech_cells_generic:   { git: "https://github.com/pulp-platform/tech_cells_generic.git"  , version: =0.2.13                                }

diff --git a/Bender.lock b/Bender.lock
@@ -106,7 +106,7 @@ packages:
       Git: https://github.com/AlSaqr-platform/can_bus.git
     dependencies: []
   cheshire:
-    revision: fc09f729a3ead5efcdd7b7ff579776820e0f5443
+    revision: 6d389373df6b54c09888f89411b7e231d2430722
     version: null
     source:
       Git: https://github.com/pulp-platform/cheshire.git
@@ -162,8 +162,8 @@ packages:
     dependencies:
     - hci
   common_cells:
-    revision: 2bd027cb87eaa9bf7d17196ec5f69864b35b630f
-    version: 1.32.0
+    revision: 13f28aa0021fc22c0d01a12d618fda58d2c93239
+    version: 1.33.0
     source:
       Git: https://github.com/pulp-platform/common_cells.git
     dependencies:
@@ -419,8 +419,8 @@ packages:
     - register_interface
     - tech_cells_generic
   register_interface:
-    revision: e4b20be8833180863ebc64675c93b1694239c505
-    version: null
+    revision: e25b36670ff7aab3402f40efcc2b11ee0f31cf19
+    version: 0.4.3
     source:
       Git: https://github.com/pulp-platform/register_interface.git
     dependencies:

diff --git a/Bender.yml b/Bender.yml
@@ -11,9 +11,9 @@ package:
     - "Yvan Tortorella <[email protected]>"
 
 dependencies:
-  register_interface: { git: https://github.com/pulp-platform/register_interface.git,   version: 0.4.2                                }
+  register_interface: { git: https://github.com/pulp-platform/register_interface.git,   version: 0.4.3                                }
   axi:                { git: https://github.com/pulp-platform/axi.git,                  version: 0.39.1                               }
-  cheshire:           { git: https://github.com/pulp-platform/cheshire.git,             rev: fc09f729a3ead5efcdd7b7ff579776820e0f5443 } # branch: astral
+  cheshire:           { git: https://github.com/pulp-platform/cheshire.git,             rev: 6d389373df6b54c09888f89411b7e231d2430722 } # branch: astral-new
   hyperbus:           { git: https://github.com/pulp-platform/hyperbus.git,             rev: f039e601c8b6590181734e6d26ff8b77aa380412 } # branch: chi/add_fsm_with_Tcsh
   dyn_mem:            { git: https://github.com/pulp-platform/dyn_spm.git,              rev: 480590062742230dc9bd4050358a15b4747bdf34 } # branch: main
   safety_island:      { git: https://github.com/pulp-platform/safety_island.git,        rev: aaef55c798ab53560faaf451a86668fa1e6d0f3b } # branch: carfield

diff --git a/carfield.mk b/carfield.mk
@@ -45,8 +45,8 @@ include $(CAR_ROOT)/bender-safed.mk
 # Nonfree components #
 ######################
 
-CAR_NONFREE_REMOTE ?= [email protected]:carfield/carfield-nonfree.git
-CAR_NONFREE_COMMIT ?= 54ce7e49
+CAR_NONFREE_REMOTE ?= [email protected]:astral/astral-nonfree.git
+CAR_NONFREE_COMMIT ?= 711d0097
 
 ## @section Carfield platform nonfree components
 ## Clone the non-free verification IP for Carfield. Some components such as CI scripts and ASIC
@@ -55,10 +55,10 @@ CAR_NONFREE_COMMIT ?= 54ce7e49
 ## step will be skipped and the usage of the repository will **not** be compromised.
 car-nonfree-init:
 	git clone $(CAR_NONFREE_REMOTE) $(CAR_ROOT)/nonfree
-	cd nonfree && git checkout $(CAR_NONFREE_COMMIT)
-	cd nonfree/intel16 && icdesign intel16 -update all -nogui
+	cd $(CAR_ROOT)/nonfree && git checkout $(CAR_NONFREE_COMMIT)
+	#cd nonfree/intel16 && icdesign intel16 -update all -nogui
 
--include nonfree/nonfree.mk
+-include $(CAR_ROOT)/nonfree/nonfree.mk
 
 #####################################
 # Islands' variables initialization #

diff --git a/hw/carfield.sv b/hw/carfield.sv
@@ -756,7 +756,7 @@ for (genvar i=0; i<NumSyncRegSlv; i++ ) begin : gen_chs_ext_reg_cut
   );
 end
 
-// Passsing the `ext_reg_req_cut[CarfieldRegBusSlvIdx.pcrs]` value to the
+// Passing the `ext_reg_req_cut[CarfieldRegBusSlvIdx.pcrs]` value to the
 // reg_req_i/rsp_o buses results in Questa's `Fatal: Unexpected signal: 11.`
 // at compile time. Direct casting 'int(CarfieldRegBusSlvIdx.pcrs) also does
 // not work resulting in the ext_reg_rsp_cut bus being all X. The localparam
@@ -1196,14 +1196,12 @@ if (CarfieldIslandsCfg.l2_port0.enable) begin: gen_l2
     .slvport_w_data_i    ( axi_slv_ext_w_data  [NumL2Ports-1:0] ),
     .slvport_w_wptr_i    ( axi_slv_ext_w_wptr  [NumL2Ports-1:0] ),
     .slvport_w_rptr_o    ( axi_slv_ext_w_rptr  [NumL2Ports-1:0] ),
-    // verilog_lint: waive-start line-length
     .l2_ecc_reg_async_mst_req_i  ( ext_reg_async_slv_req_out [EccAsyncIdx] ),
     .l2_ecc_reg_async_mst_ack_o  ( ext_reg_async_slv_ack_in  [EccAsyncIdx] ),
     .l2_ecc_reg_async_mst_data_i ( ext_reg_async_slv_data_out[EccAsyncIdx] ),
     .l2_ecc_reg_async_mst_req_o  ( ext_reg_async_slv_req_in  [EccAsyncIdx] ),
     .l2_ecc_reg_async_mst_ack_i  ( ext_reg_async_slv_ack_out [EccAsyncIdx] ),
     .l2_ecc_reg_async_mst_data_o ( ext_reg_async_slv_data_in [EccAsyncIdx] ),
-    // verilog_lint: waive-stop line-length
     .ecc_error_o         ( l2_ecc_err                           )
   );
 end else begin: gen_no_l2

diff --git a/hw/carfield_pkg.sv b/hw/carfield_pkg.sv
@@ -549,9 +549,9 @@ localparam cheshire_cfg_t CarfieldCfgDefault = '{
   AxiUserErrLsb     : 4,
   RegMaxReadTxns    : 8,
   RegMaxWriteTxns   : 8,
-  AxiToRegCut       : 1,
   RegAmoNumCuts     : 1,
   RegAmoPostCut     : 1,
+  RegAdaptMemCut    : 1,
   // External AXI ports (at most 8 ports and rules)
   AxiExtNumMst      : CarfieldAxiNumMasters,
   AxiExtNumSlv      : CarfieldAxiNumSlaves,

diff --git a/sw/include/hmr.h b/sw/include/hmr.h
@@ -16,7 +16,7 @@
 void __attribute__((naked)) hmr_store_state() {
   // Disable caches
   __asm__ __volatile__ (
-    "csrrwi x0, 0x701, 0x0 \n\t"
+    "csrrwi x0, 0x7C1, 0x0 \n\t"
     : : : "memory");
 
   __asm__ __volatile__ (
@@ -106,7 +106,7 @@ void __attribute__((naked)) hmr_store_state() {
 
   // Re-enable caches
   __asm__ __volatile__ (
-    "csrrwi x0, 0x701, 0x1 \n\t"
+    "csrrwi x0, 0x7C1, 0x1 \n\t"
     : : : "memory");
 
   // Sleep until reset

diff --git a/sw/tests/bare-metal/hostd/helloworld.c b/sw/tests/bare-metal/hostd/helloworld.c
@@ -13,6 +13,7 @@
 #include "params.h"
 #include "util.h"
 #include "car_util.h"
+#include "printf.h"
 
 int main(void) {
 
@@ -22,11 +23,6 @@ int main(void) {
     // Init the HW
     car_init_start();
 
-    char str[] = "Hello World!\r\n";
-    uint32_t rtc_freq = *reg32(&__base_regs, CHESHIRE_RTC_FREQ_REG_OFFSET);
-    uint64_t reset_freq = clint_get_core_freq(rtc_freq, 2500);
-    uart_init(&__base_uart, reset_freq, 115200);
-    uart_write_str(&__base_uart, str, sizeof(str));
-    uart_write_flush(&__base_uart);
+    printf("Hi\n");
     return 0;
 }
diff --git a/target/sim/src/carfield_tb.sv b/target/sim/src/carfield_tb.sv
@@ -20,6 +20,7 @@ module tb_carfield_soc;
 
   // carfield top
   carfield_soc_fixture fix();
+  bit jtag_check_write = 1'b0;
 
   // cheshire
   string      chs_preload_elf;
@@ -336,14 +337,14 @@ module tb_carfield_soc;
             // Write bootaddress to each core
             $display("[JTAG PULPD] Write PULP cluster boot address for each core");
             for (int c = 0; c < PulpdNumCores; c++) begin
-              fix.chs_vip.jtag_write_reg32(PulpdBootAddr + c*32'h4, PulpdBootAddrL2);
+              fix.chs_vip.jtag_write_reg32(PulpdBootAddr + c*32'h4, PulpdBootAddrL2, jtag_check_write);
             end
             // Write boot enable
             $display("[JTAG PULPD] Write PULP cluster boot enable");
-            fix.chs_vip.jtag_write_reg32(CarSocCtrlPulpdBootEnAddr, 32'h1);
+            fix.chs_vip.jtag_write_reg32(CarSocCtrlPulpdBootEnAddr, 32'h1, jtag_check_write);
             // Write fetch enable
             $display("[JTAG PULPD] Write PULP cluster fetch enable");
-            fix.chs_vip.jtag_write_reg32(CarSocCtrlPulpdFetchEnAddr, 32'h1);
+            fix.chs_vip.jtag_write_reg32(CarSocCtrlPulpdFetchEnAddr, 32'h1, jtag_check_write);
 
             // Poll memory address for PULP EOC
             fix.chs_vip.jtag_poll_bit0(CarSocCtrlPulpdEocAddr, pulpd_exit_code, 20);
@@ -480,22 +481,22 @@ module tb_carfield_soc;
 
             // write start address into the csr
             $display("[JTAG SPATZD] write the CSR %x of spatz with the entry point %x", spatz_cluster_pkg::PeriStartAddr + spatz_cluster_peripheral_reg_pkg::SPATZ_CLUSTER_PERIPHERAL_CLUSTER_BOOT_CONTROL_OFFSET, spatzd_binary_entry);
-            fix.chs_vip.jtag_write_reg(spatz_cluster_pkg::PeriStartAddr + spatz_cluster_peripheral_reg_pkg::SPATZ_CLUSTER_PERIPHERAL_CLUSTER_BOOT_CONTROL_OFFSET, spatzd_binary_entry );
+            fix.chs_vip.jtag_write_reg32(spatz_cluster_pkg::PeriStartAddr + spatz_cluster_peripheral_reg_pkg::SPATZ_CLUSTER_PERIPHERAL_CLUSTER_BOOT_CONTROL_OFFSET, spatzd_binary_entry, jtag_check_write);
 
             // Set interrupt on mailbox mailbox id MBOX_SPATZD_CORE0_ID and MBOX_SPATZD_CORE1_ID
             spatzd_reg_value = 64'h1;
             $display("[JTAG SPATZD] Set mailbox interrupt ID  %x at %x ",MBOX_SPATZ_CORE0_ID, CAR_MBOX_BASE +  MBOX_INT_SND_SET_OFFSET + (MBOX_SPATZ_CORE0_ID*32'h100));
-            fix.chs_vip.jtag_write_reg32(CAR_MBOX_BASE +  MBOX_INT_SND_SET_OFFSET + (MBOX_SPATZ_CORE0_ID*32'h100) , spatzd_reg_value);
+            fix.chs_vip.jtag_write_reg32(CAR_MBOX_BASE +  MBOX_INT_SND_SET_OFFSET + (MBOX_SPATZ_CORE0_ID*32'h100) , spatzd_reg_value, jtag_check_write);
 
             $display("[JTAG SPATZD] Set mailbox interrupt ID  %x at %x ",MBOX_SPATZ_CORE1_ID, CAR_MBOX_BASE +  MBOX_INT_SND_SET_OFFSET + (MBOX_SPATZ_CORE1_ID*32'h100));
-            fix.chs_vip.jtag_write_reg32(CAR_MBOX_BASE +  MBOX_INT_SND_SET_OFFSET + (MBOX_SPATZ_CORE1_ID*32'h100) , spatzd_reg_value);
+            fix.chs_vip.jtag_write_reg32(CAR_MBOX_BASE +  MBOX_INT_SND_SET_OFFSET + (MBOX_SPATZ_CORE1_ID*32'h100) , spatzd_reg_value, jtag_check_write);
 
             // Enable interrupt on mailbox id MBOX_SPATZ_CORE0_ID and MBOX_SPATZ_CORE1_ID
             $display("[JTAG SPATZD] Enable mailbox interrupt ID  %x at %x ",MBOX_SPATZ_CORE0_ID, CAR_MBOX_BASE +  MBOX_INT_SND_EN_OFFSET + (MBOX_SPATZ_CORE0_ID*32'h100) ,spatzd_reg_value);
-            fix.chs_vip.jtag_write_reg32(CAR_MBOX_BASE +  MBOX_INT_SND_EN_OFFSET + (MBOX_SPATZ_CORE0_ID*32'h100) , spatzd_reg_value);
+            fix.chs_vip.jtag_write_reg32(CAR_MBOX_BASE +  MBOX_INT_SND_EN_OFFSET + (MBOX_SPATZ_CORE0_ID*32'h100) , spatzd_reg_value, jtag_check_write);
 
             $display("[JTAG SPATZD] Enable mailbox interrupt ID  %x at %x ",MBOX_SPATZ_CORE1_ID, CAR_MBOX_BASE +  MBOX_INT_SND_EN_OFFSET + (MBOX_SPATZ_CORE1_ID*32'h100) ,spatzd_reg_value);
-            fix.chs_vip.jtag_write_reg32(CAR_MBOX_BASE +  MBOX_INT_SND_EN_OFFSET + (MBOX_SPATZ_CORE1_ID*32'h100) , spatzd_reg_value);
+            fix.chs_vip.jtag_write_reg32(CAR_MBOX_BASE +  MBOX_INT_SND_EN_OFFSET + (MBOX_SPATZ_CORE1_ID*32'h100) , spatzd_reg_value, jtag_check_write);
 
             // Poll memory address for Spatz EOC
             fix.chs_vip.jtag_poll_bit0(spatz_cluster_pkg::PeriStartAddr + spatz_cluster_peripheral_reg_pkg::SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT_OFFSET, spatzd_exit_code, 20);