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Bugfixes, support for new CPUs (Alder Lake-H), support for E-Core tweaking (limited)
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@psyq321
psyq321 committed Jan 16, 2022
1 parent 06301cb commit ccec86c
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25 changes: 15 additions & 10 deletions PowerMonkeyApp/ASMx64/SaferAsm.nasm
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Original file line number Diff line number Diff line change
Expand Up @@ -877,15 +877,19 @@ smo_done:

mov r10, rdx
mov eax, ecx
xor ecx, ecx
push rax

cpuid

mov dword [r10], eax
mov dword [r10+4 ], ebx
mov dword [r10+8 ], ecx
mov dword [r10+12], edx
mov [r10], eax
mov [r10+4 ], ebx
mov [r10+8 ], ecx
mov [r10+12], edx
pop rax
pop rbx
ret

;------------------------------------------------------------------------------
Expand All @@ -900,18 +904,19 @@ smo_done:
global _pm_cpuid_ex
_pm_cpuid_ex:

push rbx
push rbx
mov eax, ecx
mov ecx, edx
push rax

cpuid

mov dword [r8], eax
mov dword [r8+4 ], ebx
mov dword [r8+8 ], ecx
mov dword [r8+12], edx
mov [r8], eax
mov [r8+4 ], ebx
mov [r8+8 ], ecx
mov [r8+12], edx
pop rax
pop rbx
ret

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53 changes: 31 additions & 22 deletions PowerMonkeyApp/CONFIGURATION.c
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Expand Up @@ -196,8 +196,9 @@ VOID ApplyComputerOwnersPolicy(IN PLATFORM* sys)
/// NOTE: Legacy V/F overrides >will not apply< if you chose to program
/// individual V/F points.

//
// Legacy (will be ignored in vfpoints are used)
///////////////////////////////
// Legacy (entire VF curve) //
///////////////////////////////

pk->planes[IACORE].VoltMode =
pk->planes[RING].VoltMode = V_IPOLATIVE; // V_IPOLATIVE = Interpolate
Expand All @@ -206,9 +207,8 @@ VOID ApplyComputerOwnersPolicy(IN PLATFORM* sys)
pk->planes[RING].TargetVolts = 0; // in mV (absolute)

pk->planes[IACORE].OffsetVolts =
pk->planes[RING].OffsetVolts = -50; // in mV
pk->planes[RING].OffsetVolts = 0;// -50; // in mV
// (negative = undervolt)


///
/// V/F OVERRIDES FOR DOMAIN: E-Core (ADL & Co. only)
Expand All @@ -229,7 +229,7 @@ VOID ApplyComputerOwnersPolicy(IN PLATFORM* sys)
// V_OVERRIDE = Override

pk->planes[UNCORE].TargetVolts = 0; // in mV (absolute)
pk->planes[UNCORE].OffsetVolts = -35; // in mV (negative = undervolt)
pk->planes[UNCORE].OffsetVolts = 0;// -35; // in mV (negative = undervolt)

// Add your adjustments here if needed

Expand Down Expand Up @@ -272,15 +272,14 @@ VOID ApplyComputerOwnersPolicy(IN PLATFORM* sys)
/// SVID, then you must program the same voltage adjustment for both

pk->Program_VF_Points[IACORE] = // 0 - Do not program
pk->Program_VF_Points[RING] = 0; // 1 - Program
pk->Program_VF_Points[RING] = 1; // 1 - Program
// 2 - Print current values
// (2 does not program)

//
// Hybrid Architectures (Alder Lake +): E-Cores

// 1 - Program
pk->Program_VF_Points[ECORE] = 0; // 0 - Do not program
pk->Program_VF_Points[ECORE] = 1; // 0 - Do not program
// 2 - Print current values
// (2 does not program)

Expand Down Expand Up @@ -333,14 +332,16 @@ VOID ApplyComputerOwnersPolicy(IN PLATFORM* sys)
///
/// CPU: Alder Lake-S 12900K PRQ
/// Autotune script: prime95_ultrashort
/// E-Cores: Disabled
/// AVX-512: Enabled
///
/// Crash offsets (in mV) per VF point:
///
/// 0.8GHz 1.8GHz 3.6GHz 4.0GHz 4.2GHz 4.8GHz 5.0GHz 5.3GHz
/// AVX512: N/A -244 -238 -225 -235 -190 -158 N/A
/// AVX2 N/A -240 -230 -214 -230 -170 -144 N/A
/// SSE N/A -250 -246 -232 -238 -186 -172 N/A

pk->planes[IACORE].vfPoint[0].VOffset =
pk->planes[RING].vfPoint[0].VOffset = 0; // V_Offset @ 800 MHz (mV)

Expand Down Expand Up @@ -371,7 +372,6 @@ VOID ApplyComputerOwnersPolicy(IN PLATFORM* sys)
pk->planes[IACORE].vfPoint[9].VOffset =
pk->planes[RING].vfPoint[9].VOffset = 0; // V_Offset @ 5300 MHz (mV)


/////////////////////////////
// E-Cores - bogus values, //
/////////////////////////////
Expand All @@ -381,6 +381,8 @@ VOID ApplyComputerOwnersPolicy(IN PLATFORM* sys)
pk->planes[ECORE].vfPoint[2].VOffset = 0;
pk->planes[ECORE].vfPoint[3].VOffset = 0;
pk->planes[ECORE].vfPoint[4].VOffset = 0;
pk->planes[ECORE].vfPoint[5].VOffset = 0;
pk->planes[ECORE].vfPoint[6].VOffset = 0;

#endif

Expand Down Expand Up @@ -429,20 +431,27 @@ VOID ApplyComputerOwnersPolicy(IN PLATFORM* sys)
// (e.g. 1C, 2C, 4C, 8C, = use this ratio). Remove or set to 0
// if you do not wish to set it

pk->ForcedRatioForAllCoreCounts = 51;
pk->ForcedRatioForPCoreCounts = 51; // Pre ADL-S/H/P: All cores
// ADL_S/H/P and newer: P-Cores
// 0 = "do not change - leave as=is"


/////////////////////
/// Power Control ///
/////////////////////
pk->ForcedRatioForECoreCounts = 0; // Pre ADL-S/H/P: not applicable
// ADL_S and newer: E-Cores


////////////////////
/// Power Tweaks ///
////////////////////

pk->ProgramPowerControl = 1; // Enable programing of power
// control knobs
pk->ProgramPowerTweaks = 1; // Enable programing of power
// control knobs

pk->EnableEETurbo = 1; // Energy Efficient Turbo
// (0=disable, 1=enable)
pk->EnableEETurbo = 1; // Energy Efficient Turbo
// (0=disable, 1=enable)

pk->EnableRaceToHalt = 1; // Race To Halt
// (0=disable, 1=enable)
pk->EnableRaceToHalt = 1; // Race To Halt
// (0=disable, 1=enable)

////////////////////
/// Power Limits ///
Expand Down Expand Up @@ -530,8 +539,8 @@ VOID ApplyComputerOwnersPolicy(IN PLATFORM* sys)

pk->EnableMmioPkgPL1 = 1; // Enable MMIO PL1
pk->EnableMmioPkgPL2 = 1; // Enable MMIO PL2
pk->MmioPkgPL1_Power = MAX_POWAH; // MMIO PL1 in mW or MAX_POWAH
pk->MmioPkgPL2_Power = MAX_POWAH; // MMIO PL2 in mW or MAX_POWAH
pk->MmioPkgPL1_Power = MAX_POWAH; // MMIO PL1 in mW or MAX_POWAH
pk->MmioPkgPL2_Power = MAX_POWAH; // MMIO PL2 in mW or MAX_POWAH
pk->MmioPkgPL_Time = MAX_POWAH; // Tau in ms or MAX_POWAH
pk->ClampMmioPkgPL = 1; // Allow clamping
pk->LockMmioPkgPL12 = 1; // Lock after programming
Expand Down
31 changes: 26 additions & 5 deletions PowerMonkeyApp/CpuData.c
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Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,7 @@
#include "CpuData.h"
#include "OcMailbox.h"
#include "MiniLog.h"
#include "SaferAsmHdr.h"

CPUINFO gCpuInfo = { 0 };

Expand Down Expand Up @@ -143,13 +144,19 @@ CPUCONFIGTABLE gCpuConfigTable[] = {
{ {6, 165, 4} , "CometLake", 0, 10, 1, 0, &vcfg_q_xyzlake_client },
{ {6, 165, 5} , "CometLake-S", 0, 10, 1, 0, &vcfg_q_xyzlake_client },
{ {6, 166, 0} , "CometLake", 0, 10, 1, 0, &vcfg_q_xyzlake_client },

{ {6, 167, 0} , "RocketLake", 0, 10, 1, 0, &vcfg_q_xyzlake_client }, // RKL-S ES
{ {6, 167, 1} , "RocketLake", 0, 10, 1, 0, &vcfg_q_xyzlake_client }, // RKL-S QS/PRQ
{ {6, 151, 2} , "AlderLake-S", 0, 11, 1, 1, &vcfg_q_alderlake_client }, // ADL-S QS/PRQ
{ {6, 151, 4} , "AlderLake-S", 0, 11, 1, 1, &vcfg_q_alderlake_client }, // ADL-S
{ {6, 151, 5} , "AlderLake-S", 0, 11, 1, 1, &vcfg_q_alderlake_client }, // ADL-S
{ {6, 154, 2} , "AlderLake-P", 0, 11, 1, 1, &vcfg_q_alderlake_client }, // ADL-P
{ {6, 154, 3} , "AlderLake-P", 0, 11, 1, 1, &vcfg_q_alderlake_client }, // ADL-P

{ {6, 151, 0} , "AlderLake", 0, 11, 1, 1, &vcfg_q_alderlake_client }, // (90670)
{ {6, 151, 1} , "AlderLake-S", 0, 11, 1, 1, &vcfg_q_alderlake_client }, // ADL-S ES2 (90671)
{ {6, 151, 2} , "AlderLake-S", 0, 11, 1, 1, &vcfg_q_alderlake_client }, // ADL-S QS/PRQ (90672)
{ {6, 151, 4} , "AlderLake-S", 0, 11, 1, 1, &vcfg_q_alderlake_client }, // ADL-S (90674)
{ {6, 151, 5} , "AlderLake-S", 0, 11, 1, 1, &vcfg_q_alderlake_client }, // ADL-S QS/PRQ (90675)
{ {6, 154, 2} , "AlderLake-H/P", 0, 11, 1, 1, &vcfg_q_alderlake_client }, // ADL-H/P (906A2)
{ {6, 154, 3} , "AlderLake-H/P", 0, 11, 1, 1, &vcfg_q_alderlake_client }, // ADL-H/P (906A3)
{ {6, 154, 4} , "AlderLake-H/P", 0, 11, 1, 1, &vcfg_q_alderlake_client }, // ADL-H/P (906A4)
{ {6, 154, 1} , "AlderLake", 0, 11, 1, 1, &vcfg_q_alderlake_client },
};


Expand All @@ -170,6 +177,20 @@ BOOLEAN DetectCpu()

GetCpuInfo(&gCpuInfo);

//
// Detect BIOS-limited maximum CPUID input value
// as it would interfere with our ability to detect features

if (gCpuInfo.maxf <= 2)
{
AsciiPrint("WARNING: possible maximum CPUID input value limitation detected!\n");
AsciiPrint("This condition can interfere with CPU feature detection.\n");
AsciiPrint("For ensuring correct operation, it is advisable to disable CPUID limit.\n");
AsciiPrint("This is typically done in BIOS Setup.\n");
AsciiPrint("\n");
}


//
// BCLK

Expand Down
69 changes: 30 additions & 39 deletions PowerMonkeyApp/CpuInfo.c
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Expand Up @@ -30,6 +30,15 @@
#include "CpuInfo.h"
#include "Constants.h"

/*******************************************************************************
*
******************************************************************************/

#define CPUID_EAX 0
#define CPUID_EBX 1
#define CPUID_ECX 2
#define CPUID_EDX 3

/*******************************************************************************
*
******************************************************************************/
Expand All @@ -44,7 +53,6 @@ void GetCpuInfo(CPUINFO* ci)
{
memset(ci, 0, sizeof(CPUINFO));


//////////////////
// Brand String //
//////////////////
Expand All @@ -60,63 +68,46 @@ void GetCpuInfo(CPUINFO* ci)
// Vendor String //
///////////////////

UINT32 args[4] = {0};
UINT32 regs[4] = {0};

_pm_cpuid(0, args);
_pm_cpuid(0, regs);

UINT32 hscall = ci->maxf = args[0];
UINT32 hscall = ci->maxf = regs[CPUID_EAX];

brandstr[0] = args[1];
brandstr[1] = args[3];
brandstr[2] = args[2];

memset(args, 0, sizeof(args));

_pm_cpuid(0x01, args);
brandstr[0] = regs[CPUID_EBX];
brandstr[1] = regs[CPUID_EDX];
brandstr[2] = regs[CPUID_ECX];

_pm_cpuid(0x01, regs);

ci->f1 = args[0];
ci->stepping = args[0] & 0x0000000F;
ci->family = (UINT32)(args[0] & 0x00000F00) >> 8;
ci->model = (UINT32)(args[0] & 0x000000F0) >> 4;
ci->f1 = regs[CPUID_EAX];
ci->stepping = regs[CPUID_EAX] & 0x0000000F;
ci->family = (UINT32)(regs[CPUID_EAX] & 0x00000F00) >> 8;
ci->model = (UINT32)(regs[CPUID_EAX] & 0x000000F0) >> 4;

if ((ci->family == 0xF) || (ci->family == 0x6)) {
ci->model |= (UINT32)((args[0] & 0x0000F0000) >> 12);
ci->family |= (UINT32)((args[0] & 0x00FF00000) >> 16);
ci->model |= (UINT32)((regs[CPUID_EAX] & 0x0000F0000) >> 12);
ci->family |= (UINT32)((regs[CPUID_EAX] & 0x00FF00000) >> 16);
}


///////////////////////////////////
// Hybrid Architecture Detection //
///////////////////////////////////

memset(args, 0, sizeof(args));

_pm_cpuid(0x7, args);
_pm_cpuid(0x7, regs);

ci->HybridArch = (args[3] & bit15u32) ? 1 : 0;
ci->ECore = 0;
ci->HybridArch = ((regs[CPUID_EDX] & bit15u32)) ? 1 : 0;

if (ci->HybridArch) {
if (hscall >= 0x1A) {
_pm_cpuid(0x1A, regs);

if (hscall >= 0x1A) {

memset(args, 0, sizeof(args));

_pm_cpuid(0x1A, args);

UINT32 ct = ((args[0] & 0xFF000000) >> 24);
UINT32 ct = ((regs[CPUID_EAX] & 0xFF000000) >> 24);

if (ct == 0x20) {
ci->ECore = 1;
ci->PCore = 0;
}
else {
ci->ECore = 0;
ci->PCore = 1;
}
}
}
}
else {
ci->ECore = 0;
ci->PCore = 1;
}
}
4 changes: 1 addition & 3 deletions PowerMonkeyApp/CpuInfo.h
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Original file line number Diff line number Diff line change
Expand Up @@ -41,10 +41,8 @@ typedef struct _CPUINFO
UINT32 model;
UINT32 stepping;

BOOLEAN HybridArch;

BOOLEAN HybridArch;
BOOLEAN ECore;
BOOLEAN PCore;

} CPUINFO;

Expand Down
3 changes: 3 additions & 0 deletions PowerMonkeyApp/DelayX86.c
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Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,10 @@
#include "CpuInfo.h"
#include "CpuData.h"
#include "SaferAsmHdr.h"

#if defined(__clang__)
#include <immintrin.h>
#endif

#if defined(__GNUC__) && !defined(__clang__)
#include <x86intrin.h>
Expand Down
13 changes: 13 additions & 0 deletions PowerMonkeyApp/LowLevel.c
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Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,10 @@
#include <Uefi.h>
#include <Library/UefiLib.h>
#include <Library/BaseLib.h>

#if defined(__clang__)
#include <immintrin.h>
#endif

#include "SaferAsmHdr.h"
#include "LowLevel.h"
Expand All @@ -41,6 +44,16 @@
#pragma warning( disable : 4090 )
#endif

#if defined(__GNUC__) && !defined(__clang__)
#include <x86intrin.h>
#else

#pragma intrinsic(__rdtsc) // At this point, code will look so
#pragma intrinsic(_mm_pause) // fugly that writing it in pure SMM
// ASM would count as an improvement
#endif


/*******************************************************************************
* Globals
******************************************************************************/
Expand Down
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