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Merge pull request #152 from dshadoff/Fix_TIMER_IRQ_timing
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Fix Timer IRQ Timing ( #141 )

Confirmed by Sour (author of MESEN):
Acknowledging the TIMER IRQ with a "STA $1403" immediately prevents a pending TIMER IRQ from taking control immediately after the "STA $1403".

This is different from the video interrupts (which would be acknowledged by accessing $0000 - in that case, the interrupt acknowledgement is delayed by an additional cycle.

This appears to be because the TIMER interrupt is internal to the CPU, so it is instant, however the VDC acknowledgement would be processed by the VDC (say, 1 VDC cycle) before de-asserting the interrupt line to the CPU.
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pceDev16 authored Apr 11, 2024
2 parents a38be18 + a813eb0 commit f301fa4
Showing 1 changed file with 9 additions and 1 deletion.
10 changes: 9 additions & 1 deletion mednafen/src/pce/huc6280.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -42,7 +42,10 @@ namespace MDFN_IEN_PCE
INLINE void HuC6280::LastCycle(void)
{
/*assert(((P & I_FLAG) ? 0 : (uint32)~0) == PIMaskCache);*/
IRQSample = (IRQlow & IRQMask) & PIMaskCache;

// TIMER interrupt to be tested after opcodes, not one cycle early
//
IRQSample = (((IRQlow & IRQMask) & PIMaskCache) & ~IQTIMER);
IFlagSample = P & I_FLAG;
ADDCYC(1);
}
Expand Down Expand Up @@ -604,6 +607,11 @@ NO_INLINE void HuC6280::RunSub(void)
}
}

// TIMER interrupt to be tested after opcodes, not one cycle early
//
if (!IFlagSample)
IRQSample |= (IRQlow & IRQMask & IQTIMER);

if(IRQSample | IRQlow)
{
if(MDFN_UNLIKELY(IRQSample & IQRESET))
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