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fix: Fix LUI, AUIPC and JAL
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howjmay committed Feb 10, 2024
1 parent ac3f7c1 commit c708837
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Showing 4 changed files with 16 additions and 8 deletions.
6 changes: 5 additions & 1 deletion src/cpu.rs
Original file line number Diff line number Diff line change
Expand Up @@ -126,7 +126,11 @@ pub fn exec_jal(cpu: &mut CPU, instr: u32) {
cpu.xregs.regs[rd(instr) as usize] = cpu.pc + 4;
cpu.pc = (cpu.pc as i64 + imm) as u64;
}
pub fn exec_jalr(cpu: &mut CPU, instr: u32) {}
pub fn exec_jalr(cpu: &mut CPU, instr: u32) {
let imm = (imm_J(instr) as i32) as i64;
cpu.xregs.regs[rd(instr) as usize] = cpu.pc + 4;
cpu.pc = (cpu.pc as i64 + imm) as u64;
}
pub fn exec_beq(cpu: &mut CPU, instr: u32) {}
pub fn exec_bne(cpu: &mut CPU, instr: u32) {}
pub fn exec_blt(cpu: &mut CPU, instr: u32) {}
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2 changes: 1 addition & 1 deletion src/opcode.rs
Original file line number Diff line number Diff line change
Expand Up @@ -128,7 +128,7 @@ pub fn imm_I(instr: u32) -> i32 {

pub fn imm_U(instr: u32) -> u64 {
// imm[31:12] = inst[31:12]
return (instr & 0xfffff800) as u64;
return (instr & 0xfffff000) as u64;
}

pub fn imm_J(instr: u32) -> u64 {
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12 changes: 6 additions & 6 deletions tests/cpu_test.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,27 +10,27 @@ mod tests {
let mut cpu_test = cpu::CPU::new();

// lui x5, 4
let instr: u32 = helper::set_u_type_instruction(4, 5, LUI as u8);
let instr: u32 = helper::set_u_type_instruction(4 << 12, 5, LUI as u8);
cpu::exec_lui(&mut cpu_test, instr);
assert_eq!(cpu_test.xregs.regs[5], 4 << 12);

// lui x5, -4
let instr: u32 = helper::set_u_type_instruction(-4, 5, LUI as u8);
let instr: u32 = helper::set_u_type_instruction(-(4 << 12), 5, LUI as u8);
cpu::exec_lui(&mut cpu_test, instr);
assert_eq!(cpu_test.xregs.regs[5], (-4 << 12) as u64);
assert_eq!(cpu_test.xregs.regs[5], -(4 << 12) as u64);
}
#[test]
fn test_exec_auipc() {
let mut cpu_test = cpu::CPU::new();

let ori_pc = cpu_test.pc;
// auipc x5, 4
let instr: u32 = helper::set_u_type_instruction(4, 5, AUIPC as u8);
let instr: u32 = helper::set_u_type_instruction(4 << 12, 5, AUIPC as u8);
cpu::exec_auipc(&mut cpu_test, instr);
assert_eq!(cpu_test.xregs.regs[5], ori_pc + (4 << 12));

// auipc x5, -4
let instr: u32 = helper::set_u_type_instruction(-4, 5, AUIPC as u8);
let instr: u32 = helper::set_u_type_instruction(-(4 << 12), 5, AUIPC as u8);
cpu::exec_auipc(&mut cpu_test, instr);
assert_eq!(cpu_test.xregs.regs[5], (ori_pc as i64 + (-4 << 12)) as u64);
}
Expand All @@ -40,7 +40,7 @@ mod tests {

let ori_pc = cpu_test.pc;
// jal x5, 12
let instr: u32 = helper::set_u_type_instruction(12, 5, JAL as u8);
let instr: u32 = helper::set_j_type_instruction(12, 5, JAL as u8);
cpu::exec_jal(&mut cpu_test, instr);
assert_eq!(cpu_test.xregs.regs[5], ori_pc + 4);
assert_eq!(cpu_test.pc, ori_pc + 12);
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4 changes: 4 additions & 0 deletions tests/helper.rs
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,10 @@ pub fn set_i_type_instruction(imm: i16, rs1: u8, funct3: u8, rd: u8) -> u32 {
}

pub fn set_u_type_instruction(imm: i32, rd: u8, opcode: u8) -> u32 {
return (imm as u32 & 0xfffff000) as u32 | ((rd as u32 & 0x1f) << 7) | ((opcode as u32) & 0x7f);
}

pub fn set_j_type_instruction(imm: i32, rd: u8, opcode: u8) -> u32 {
// |31-12|11-7|6-0|
// imm[20|10:1|11|19:12] = instr[31|30:21|20|19:12]
let instr_imm = (((imm as i64) << 11) & 0x80000000)
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