Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

basic-sink: fix message receive loop exit #249

Merged
merged 1 commit into from
Dec 10, 2024
Merged

basic-sink: fix message receive loop exit #249

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion hdl/ip/vhd/vunit_components/basic_stream/basic_sink.vhd
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -56,9 +56,9 @@ begin
push_std_ulogic_vector(reply_msg, data);
reply(net, msg, reply_msg);
ready <= '0';
exit;
end if;
ready <= '0';
exit;
end loop;
else
unexpected_msg_type(msg_type);
Expand Down
34 changes: 17 additions & 17 deletions hdl/ip/vhd/vunit_components/basic_stream/sims/th_basic_stream.vhd
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -31,22 +31,22 @@ begin
clk <= not clk after 4 ns;

basic_source_vc : entity work.basic_source
generic map (
source => source)
port map (
clk => clk,
valid => valid,
ready => ready,
data => data
);
generic map (
source => source)
port map (
clk => clk,
valid => valid,
ready => ready,
data => data
);

basic_sink_vc : entity work.basic_sink
generic map (
sink => sink)
port map (
clk => clk,
valid => valid,
ready => ready,
data => data
);
basic_sink_vc : entity work.basic_sink
generic map (
sink => sink)
port map (
clk => clk,
valid => valid,
ready => ready,
data => data
);
end architecture;