fix: clippy lints

assembler/src/command_metadata.rs

@@ -97,7 +97,7 @@ impl SourceCommandMetadata {
                 opcode: Opcode::HALT,
                 argument_type: Argument::parse_none,
             }),
-            _ => return Err(ParsingError::UnknownCommand(opcode.to_owned())),
+            _ => Err(ParsingError::UnknownCommand(opcode.to_owned())),
         }
     }
 }

assembler/src/compiler.rs

@@ -28,7 +28,7 @@ struct AddressIterator<T> {
 }
 
 impl<'a> AddressIterator<std::slice::Iter<'a, SourceCodeItem>> {
-    fn new(items: &'a Vec<SourceCodeItem>) -> Self {
+    fn new(items: &'a [SourceCodeItem]) -> Self {
         Self {
             items: items.iter(),
             next_address: 0,
@@ -72,7 +72,7 @@ impl<'a, T: Iterator<Item = &'a SourceCodeItem>> Iterator for AddressIterator<T>
 }
 
 impl ParsedProgram {
-    fn addresses(items: &Vec<SourceCodeItem>) -> AddressIterator<std::slice::Iter<SourceCodeItem>> {
+    fn addresses(items: &[SourceCodeItem]) -> AddressIterator<std::slice::Iter<SourceCodeItem>> {
         AddressIterator::new(items)
     }
 
@@ -114,8 +114,8 @@ impl ParsedProgram {
                         continue;
                     }
                     CompilerDirective::Data(data) => data
-                        .into_iter()
-                        .map(|&byte| MemoryItem::Data(byte as u32))
+                        .iter()
+                        .map(|&machine_word| MemoryItem::Data(machine_word))
                         .for_each(|item| current_section.items.push(item)),
                     CompilerDirective::Pointer(label) => {
                         current_section.items.push(MemoryItem::Data(

assembler/src/parser.rs

@@ -39,7 +39,7 @@ impl ParsedProgram {
         }
 
         self.labels.insert(label, self.items.len());
-        return Ok(());
+        Ok(())
     }
 }
 
@@ -106,5 +106,5 @@ fn process_line(line: &str, program: &mut ParsedProgram) -> Result<(), ParsingEr
     let command = SourceCodeCommand::from_token_stream(&mut tokens)?;
     program.items.push(SourceCodeItem::Command(command));
 
-    return Ok(());
+    Ok(())
 }

assembler/src/parser/address.rs

@@ -25,7 +25,7 @@ impl AddressWithMode {
             return Ok(AddressingMode::Indirect);
         }
 
-        return Ok(AddressingMode::Relative);
+        Ok(AddressingMode::Relative)
     }
 
     fn parse_address(stream: &mut TokenStream) -> Result<Reference, ParsingError> {

assembler/src/parser/compiler_directive.rs

@@ -16,7 +16,7 @@ impl CompilerDirective {
                     }
 
                     while let Ok(number) = stream.next_long_number() {
-                        data.push(number as u32);
+                        data.push(number);
                     }
 
                     // ensure that no unparsed input left

assembler/src/parser/token.rs

@@ -76,7 +76,7 @@ impl FromStr for TokenStream {
                     .tokens
                     .push(Token::Word(found.as_str().to_owned()));
 
-                assert!(found.len() > 0, "match should be NON-empty");
+                assert!(!found.is_empty(), "match should be NON-empty");
                 index += found.len();
                 continue;
             }
@@ -173,15 +173,14 @@ impl TokenStream {
     }
 
     pub fn next_end_of_input(&mut self) -> Result<(), TokenStreamError> {
-        let output = match self.peek(1) {
-            Ok(Token::EndOfInput) => (),
-            Ok(token) => return Err(TokenStreamError::UnexpectedToken(token.clone())),
-            Err(err) => return Err(err),
-        };
-
-        self.advance_cursor();
-
-        Ok(output)
+        match self.peek(1) {
+            Ok(Token::EndOfInput) => {
+                self.advance_cursor();
+                Ok(())
+            },
+            Ok(token) => Err(TokenStreamError::UnexpectedToken(token.clone())),
+            Err(err) => Err(err),
+        }
     }
 }
 
@@ -195,7 +194,7 @@ fn parse_number<T: Integer>(input: &str) -> Option<(T, usize)> {
     let prefix = parsed.name("prefix").map_or("", |matched| matched.as_str());
     let value = &parsed["number"];
 
-    let value = value.replace("_", "");
+    let value = value.replace('_', "");
     let radix = match prefix {
         "0x" => 16,
         "0b" => 2,

cli_utils/src/lib.rs

@@ -1,8 +1,8 @@
 use std::{error::Error, fmt::Display, path::PathBuf};
 
-pub fn check_empty_arguments(args: &Vec<String>) -> Result<(), ConfigurationError> {
+pub fn check_empty_arguments(args: &[String]) -> Result<(), ConfigurationError> {
     for (index, arg) in args.iter().enumerate() {
-        if arg.len() < 1 {
+        if arg.is_empty() {
             return Err(ConfigurationError::EmptyArgument(index));
         }
     }

cpu/src/cpu.rs

@@ -18,7 +18,7 @@ type MicrocodeStorage = Vec<Microinstruction>;
 type MicroInstructionCounter = usize;
 type TRegisterValue = u32;
 
-pub struct CPU {
+pub struct Cpu {
     io_controller: IOController,
     registers: Registers,
     status: Status,
@@ -27,7 +27,7 @@ pub struct CPU {
     microcode_program_counter: MicroInstructionCounter,
 }
 
-impl Debug for CPU {
+impl Debug for Cpu {
     fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
         f.debug_struct("CPU")
             .field("io_controller", &self.io_controller)
@@ -38,17 +38,16 @@ impl Debug for CPU {
     }
 }
 
-impl Display for CPU {
+impl Display for Cpu {
     fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
         writeln!(f, "Registers:")?;
-        writeln!(f, "{}", self.registers.to_string())?;
+        writeln!(f, "{}", self.registers)?;
         writeln!(f, "Status: {}", self.status)?;
         writeln!(f, "MC Counter: {}", self.microcode_program_counter)
     }
 }
 
-
-impl CPU {
+impl Cpu {
     pub fn new(memory: Memory, io_controller: IOController) -> Self {
         Self {
             io_controller,
@@ -91,13 +90,11 @@ impl CPU {
 
             let left = if micro_instruction.contains(&Signal::ZERO_LEFT) {
                 0
+            } else if micro_instruction.contains(&Signal::SELECT_PC) {
+                // no sign extension happens
+                self.registers.program_counter as u32
             } else {
-                if micro_instruction.contains(&Signal::SELECT_PC) {
-                    // no sign extension happens
-                    self.registers.program_counter as u32
-                } else {
-                    self.registers.accumulator
-                }
+                self.registers.accumulator
             };
 
             let right_0 = micro_instruction.contains(&Signal::SELECT_RIGHT_DATA) as u8;
@@ -142,38 +139,27 @@ impl CPU {
                 }
             }
 
-            if micro_instruction
-                .get(&Signal::WRITE_PROGRAM_COUNTER)
-                .is_some()
-            {
+            if micro_instruction.contains(&Signal::WRITE_PROGRAM_COUNTER) {
                 self.registers.program_counter = alu_output.value as RawAddress;
             }
 
-            let invert_flags = micro_instruction
-                .get(&Signal::WRITE_PROGRAM_COUNTER_CLEAR)
-                .is_some();
+            let invert_flags = micro_instruction.contains(&Signal::WRITE_PROGRAM_COUNTER_CLEAR);
 
             // Z invert write
             // 0 0      0
             // 1 0      1
             // 1 1      0
             // 0 1      1
-            if micro_instruction
-                .get(&Signal::WRITE_PROGRAM_COUNTER_Z)
-                .is_some()
+            if micro_instruction.contains(&Signal::WRITE_PROGRAM_COUNTER_Z)
+                && self.status.zero != invert_flags
             {
-                if self.status.zero != invert_flags {
-                    self.registers.program_counter = alu_output.value as RawAddress;
-                }
+                self.registers.program_counter = alu_output.value as RawAddress;
             }
 
-            if micro_instruction
-                .get(&Signal::WRITE_PROGRAM_COUNTER_C)
-                .is_some()
+            if micro_instruction.contains(&Signal::WRITE_PROGRAM_COUNTER_C)
+                && self.status.carry != invert_flags
             {
-                if self.status.carry != invert_flags {
-                    self.registers.program_counter = alu_output.value as RawAddress;
-                }
+                self.registers.program_counter = alu_output.value as RawAddress;
             }
 
             if micro_instruction.contains(&Signal::WRITE_COMMAND) {
@@ -218,7 +204,11 @@ impl CPU {
             micro_instructions_executed += 1;
         }
 
-        log::info!("Instructions: {}; MC: {}", instructions_executed, micro_instructions_executed);
+        log::info!(
+            "Instructions: {}; MC: {}",
+            instructions_executed,
+            micro_instructions_executed
+        );
     }
 
     fn opcode_to_mc(opcode: Opcode) -> MicroInstructionCounter {

cpu/src/cpu/control_unit.rs

@@ -2,7 +2,9 @@ use std::collections::HashSet;
 
 use super::MicrocodeStorage;
 
-#[allow(non_camel_case_types)]
+// this is how I want to call signals. I strongly believe that
+// signal names should be uppercase as they are constants to me
+#[allow(non_camel_case_types, clippy::upper_case_acronyms)]
 #[derive(PartialEq, Eq, Hash, Clone, Copy, Debug)]
 pub enum Signal {
     // enables io

cpu/src/io_controller.rs

@@ -50,7 +50,7 @@ impl Device for SimpleInputOutput {
     }
 
     fn write_to_device(&mut self, payload: u8) {
-        std::io::stdout().write(&[payload]).unwrap();
+        std::io::stdout().write_all(&[payload]).unwrap();
     }
 }
 
@@ -79,8 +79,7 @@ impl IOController {
     }
 
     pub fn write(&mut self, device_address: RawPort, payload: u8) {
-        self.devices
-            .get_mut(&device_address)
-            .map(|device| device.write_to_device(payload));
+        if let Some(device) = self.devices
+            .get_mut(&device_address) { device.write_to_device(payload) }
     }
 }

cpu/src/main.rs

@@ -10,7 +10,7 @@ use io_controller::{IOController, SimpleInputOutput};
 use isa::CompiledProgram;
 use memory::Memory;
 
-use crate::cpu::CPU;
+use crate::cpu::Cpu;
 
 mod cpu;
 mod io_controller;
@@ -48,7 +48,7 @@ fn start() -> Result<(), Box<dyn Error>> {
     let memory = Memory::burn(program);
     let io_controller = IOController::new().connect(0, Box::new(SimpleInputOutput::new(output)));
 
-    let cpu = CPU::new(memory, io_controller);
+    let cpu = Cpu::new(memory, io_controller);
     cpu.start();
 
     Ok(())

isa/src/lib.rs

@@ -105,7 +105,7 @@ impl Display for MemoryItem {
     fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
         match self {
             MemoryItem::Data(data) => write!(f, "Data({})", data),
-            MemoryItem::Command(command) => write!(f, "Command: {}", command.to_string()),
+            MemoryItem::Command(command) => write!(f, "Command: {}", command),
         }
     }
 }