ahb2axi updated

os-fpga · Oct 6, 2023 · 8748d83 · 8748d83
1 parent 942f522
commit 8748d83
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/rapidsilicon/ip/ahb2axi_bridge/v1_0/ahb2axi_bridge_gen.py b/rapidsilicon/ip/ahb2axi_bridge/v1_0/ahb2axi_bridge_gen.py
@@ -152,15 +152,15 @@ def main():
     #IP Summary generation
     summary =  { 
     "Data width programmed": args.data_width,
-    "Address width programmed": args.address_width,
+    "Address width programmed": args.addr_width,
     "AXI ID width programmed": args.id_width,
     }
 
 
     # Export JSON Template (Optional) --------------------------------------------------------------
     if args.json_template:
         rs_builder.export_json_template(parser=parser, dep_dict=dep_dict, summary=summary)
-        
+
 
 
     ahb_interface(args.addr_width,args.data_width)