Merge pull request #175 from RapidSilicon/fifo_improv

Removed a bug in logging
os-fpga · Sep 22, 2023 · 581b1a1 · 581b1a1
2 parents 2b7da41 + 6919adb
commit 581b1a1
Showing 1 changed file with 0 additions and 2 deletions.
diff --git a/rapidsilicon/ip/fifo_generator/v1_0/litex_wrapper/fifo_litex_generator.py b/rapidsilicon/ip/fifo_generator/v1_0/litex_wrapper/fifo_litex_generator.py
@@ -14,8 +14,6 @@
 
 from litex.soc.interconnect.axi import *
 
-logging.basicConfig(level=logging.INFO)
-
 # logging.basicConfig(level=logging.INFO)
 logging.basicConfig(filename="IP.log",filemode="w", level=logging.INFO, format='%(levelname)s: %(message)s\n')