added new parameters to ocm gen

os-fpga · Oct 3, 2023 · 1f83a58 · 1f83a58
1 parent f4a56bc
commit 1f83a58
Showing 1 changed file with 35 additions and 0 deletions.
diff --git a/rapidsilicon/ip/on_chip_memory/v1_0/on_chip_memory_gen.py b/rapidsilicon/ip/on_chip_memory/v1_0/on_chip_memory_gen.py
@@ -9,6 +9,8 @@
 import logging
 import argparse
 
+from datetime import datetime
+
 from litex_wrapper.on_chip_memory_litex_wrapper import *
 
 from migen import *
@@ -183,6 +185,39 @@ def main():
             module     = module
         )
 
+        # IP_ID Parameter
+        now = datetime.datetime.now()
+        my_year         = now.year - 2022
+        year            = (bin(my_year)[2:]).zfill(7) # 7-bits  # Removing '0b' prefix = [2:]
+        month           = (bin(now.month)[2:]).zfill(4) # 4-bits
+        day             = (bin(now.day)[2:]).zfill(5) # 5-bits
+        mod_hour        = now.hour % 12 # 12 hours Format
+        hour            = (bin(mod_hour)[2:]).zfill(4) # 4-bits
+        minute          = (bin(now.minute)[2:]).zfill(6) # 6-bits
+        second          = (bin(now.second)[2:]).zfill(6) # 6-bits
+
+        # Concatenation for IP_ID Parameter
+        ip_id = ("{}{}{}{}{}{}").format(year, day, month, hour, minute, second)
+        ip_id = ("32'h{}").format(hex(int(ip_id,2))[2:])
+
+        # IP_VERSION parameter
+        #               Base  _  Major _ Minor
+        ip_version = "00000000_00000000_0000000000000001"
+        ip_version = ("32'h{}").format(hex(int(ip_version, 2))[2:])
+
+        wrapper = os.path.join(args.build_dir, "rapidsilicon", "ip", "on_chip_memory", "v1_0", args.build_name, "src",args.build_name+".v")
+        new_lines = []
+        with open (wrapper, "r") as file:
+            lines = file.readlines()
+            for i, line in enumerate(lines):
+                if ("module {}".format(args.build_name)) in line:
+                    new_lines.append("module {} #(\n\tparameter IP_TYPE \t\t= \"OCMGEN\",\n\tparameter IP_VERSION \t= {}, \n\tparameter IP_ID \t\t= {}\n)\n(".format(args.build_name, ip_version, ip_id))
+                else:
+                    new_lines.append(line)
+
+        with open(os.path.join(wrapper), "w") as file:
+            file.writelines(new_lines)
+
         # DRAM
         if (args.bram == 0):
             wrapper = os.path.join(args.build_dir, "rapidsilicon", "ip", "on_chip_memory", "v1_0", args.build_name, "src",args.build_name+".v")