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    75 repositories

    • riscv-smcdeleg-ssccfg

      Public archive
      Supervisor Counter Delegation Architecture Extension
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •2•2•1•0•Updated Jul 22, 2024Jul 22, 2024

    • documentation

      Public archive
      Group administration repository for SIG: Documentation
      Creative Commons Attribution 4.0 International
      •0•0•0•0•Updated Apr 11, 2024Apr 11, 2024

    • riscv-zacas

      Public archive
      riscv-zacas created from docs-spec-template template
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •6•9•1•1•Updated Mar 21, 2024Mar 21, 2024

    • riscv-smcntrpmf

      Public archive
      Cycle & Instret Privilege Mode Filtering Architecture Extension
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •1•3•3•1•Updated Mar 21, 2024Mar 21, 2024

    • riscv-svadu

      Public archive
      The Svadu extension adds support and CSR control for hardware updating of PTE A/D bits.
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •2•7•1•0•Updated Mar 21, 2024Mar 21, 2024

    • riscv-zicond

      Public archive
      The ISA specification for the ZiCondOps extension.
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •7•19•2•3•Updated Mar 21, 2024Mar 21, 2024

    • riscv-indirect-csr-access

      Public archive
      Smcsrind/Sscsrind is an ISA extension that extends the indirect CSR access mechanism originally defined as part of the Smaia/Ssaia extensions, in order to make it available for use by other extensions without creating an unnecessary dependence on Smaia/Ssaia.
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •1•3•2•1•Updated Mar 21, 2024Mar 21, 2024

    • riscv-code-size-reduction

      Public archive
      Python
      •34•152•16•0•Updated Feb 29, 2024Feb 29, 2024

    • riscv-zfinx

      Public archive
      Creative Commons Attribution 4.0 International
      •6•12•1•0•Updated Feb 15, 2024Feb 15, 2024

    • risc-v-getting-started-guide

      Public archive
      The official RISC-V getting started guide
      CSS
      •
      Creative Commons Attribution 4.0 International
      •57•198•11•18•Updated Feb 12, 2024Feb 12, 2024

    • riscv-time-compare

      Public archive
      TeX
      •
      Creative Commons Attribution 4.0 International
      •3•4•1•1•Updated Sep 6, 2023Sep 6, 2023

    • riscv-platform-specs

      Public archive
      RISC-V Profiles and Platform Specification
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •39•112•9•6•Updated Sep 6, 2023Sep 6, 2023

    • ras-terms-defs

      Public archive
      Group administration repository for Tech: RAS Terms and Definitions
      Creative Commons Attribution 4.0 International
      •0•0•0•0•Updated Aug 22, 2023Aug 22, 2023

    • rvm-csi

      Public archive
      Group administration repository for SIG: RISC-V Common Software Interface (RVM-CSI)
      Python
      •
      Creative Commons Attribution 4.0 International
      •2•9•1•0•Updated Jul 27, 2023Jul 27, 2023

    • riscv-gcc

      Public archive
      GNU General Public License v2.0
      •275•360•66•7•Updated May 22, 2023May 22, 2023

    • blockchain

      Public archive
      Blockchain SIG Community
      Creative Commons Attribution 4.0 International
      •0•3•0•0•Updated Apr 18, 2023Apr 18, 2023

    • riscv-zawrs

      Public archive
      The repo will be used to hold the draft Zawrs (fast-track) extension and to make releases for reviews.
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •7•6•0•0•Updated Mar 15, 2023Mar 15, 2023

    • automotive

      Public archive
      Group administration repository for SIG: Automotive
      Creative Commons Attribution 4.0 International
      •2•1•0•0•Updated Sep 21, 2022Sep 21, 2022

    • riscv-tee

      Public archive
      Makefile
      •13•37•4•1•Updated Aug 6, 2022Aug 6, 2022

    • unified-discovery

      Public archive
      TeX
      •
      Creative Commons Attribution 4.0 International
      •0•1•0•0•Updated Jul 8, 2022Jul 8, 2022

    • riscv-binutils-gdb

      Public archive
      RISC-V backports for binutils-gdb. Development is done upstream at the FSF.
      C
      •
      GNU General Public License v2.0
      •233•148•20•4•Updated Jul 7, 2022Jul 7, 2022

    • riscv-ras-terms-defs

      Public archive
      The RAS Terms & Definitions specification define the terms and definitions for physical mechanisms starting from common ones from research and development to adapting the terms as needed.
      TeX
      •
      Creative Commons Attribution 4.0 International
      •0•1•0•0•Updated Jun 7, 2022Jun 7, 2022

    • riscv-dejagnu

      Public archive
      DejaGnu RISC-V port
      TeX
      •
      GNU General Public License v3.0
      •78•12•0•1•Updated May 23, 2022May 23, 2022

    • riscv-state-enable

      Public archive
      TeX
      •
      Creative Commons Attribution 4.0 International
      •5•3•10•0•Updated May 17, 2022May 17, 2022

    • bfloat16

      Public archive
      Creative Commons Attribution 4.0 International
      •1•0•0•0•Updated May 14, 2022May 14, 2022

    • riscv-alt-fp

      Public archive
      RISC-V Alternate FP Format
      Creative Commons Attribution 4.0 International
      •3•9•0•2•Updated Apr 11, 2022Apr 11, 2022

    • cache-management-ops

      Public archive
      RISC-V CMOs Charter, Minutes, Agendas, Etc
      Other
      •0•3•0•0•Updated Mar 25, 2022Mar 25, 2022

    • riscv-newlib

      Public archive
      RISC-V port of newlib
      C
      •
      GNU General Public License v2.0
      •114•96•2•1•Updated Mar 15, 2022Mar 15, 2022

    • riscv-count-overflow

      Public archive
      TeX
      •
      Creative Commons Attribution 4.0 International
      •2•2•4•0•Updated Feb 3, 2022Feb 3, 2022

    • crypto-gost

      Public archive
      Creative Commons Attribution 4.0 International
      •0•1•0•0•Updated Feb 1, 2022Feb 1, 2022