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[CPU] Enable compressed FC via oneDNN Matmul primitive #27459
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[CPU] Enable compressed FC via oneDNN Matmul primitive #27459
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@@ -64,11 +64,11 @@ endif() | |||
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# find all the source files with the name of a class file | |||
if(X86_64) | |||
file(GLOB_RECURSE LIST_OF_TEST_ARCH_INSTANCES ${TEST_DIR}/instances/x64/${TEST_CLASS_FILE_NAME}) | |||
file(GLOB_RECURSE LIST_OF_TEST_ARCH_INSTANCES ${TEST_DIR}/x64/${TEST_CLASS_FILE_NAME}) |
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TODO: remove before merge
@@ -42,7 +42,7 @@ namespace { | |||
if (!ftz) { | |||
return; | |||
} | |||
if (src.getDesc().getPrecision() != ov::element::f32 || dst.getDesc().getPrecision() == ov::element::bf16) { | |||
if (src.getDesc().getPrecision() != ov::element::f32 || dst.getDesc().getPrecision() != ov::element::f32) { |
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@maxnick Please take a look. No sure about idea behind previous logic. Maybe you remember smt.
Anyway previous condition was incorrect for cases like src (fp32) -> dst (i32); it tried to apply ftz on i32 data.
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The original idea is to skip denormal nullifying for all the non float source types (as it doesn't make sense for integer types and bf16, as for the latter case HW implicitly assumes FTZ and DAZ flags are set when performing bf16 specific operations) also for bf16 dst type, as HW performs flushing denormal to zeros while converting float to bf16 using specific instructions.
@EgorDuplensky Please review the PR |
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Details:
-- Build OV with: -DENABLE_DEBUG_CAPS=ON cmake option
-- export OV_CPU_ENABLE_DNNL_MAMTUL_FOR_FC=1