[Accton] Support 0x56 device access via onlp_sfpi_dev_writew/readw #993
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Allow access to Marvell PHY device (0x56) through the following APIs: onlp_sfpi_dev_readw(int port, uint8_t devaddr, uint8_t addr) onlp_sfpi_dev_writew(int port, uint8_t devaddr, uint8_t addr, uint16_t value) onlp_sfpi_dev_read(int port, uint8_t devaddr, uint8_t addr, uint8_t* rdata, int size) onlp_sfpi_dev_write(int port, uint8_t devaddr, uint8_t addr, uint8_t* data, int size) Parameter Descriptions: `port`: Range from 0 to 47, specifies the port number. `devaddr`: Device address, fixed to 0x56 for the Marvell PHY device. `addr`: Register address, range from 0 to 0x1F. `value`: Register value to write, formatted as (High byte << 8) | (Low byte). `rdata`: Pointer to the buffer where register values will be read into. `data`: Pointer to the buffer containing the register values to be written. `size`: Must be greater than 0 and an even value. Signed-off-by: Brandon Chuang <[email protected]>
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Allow access to Marvell PHY device (0x56) through the following APIs:
onlp_sfpi_dev_readw(int port, uint8_t devaddr, uint8_t addr)
onlp_sfpi_dev_writew(int port, uint8_t devaddr, uint8_t addr, uint16_t value)
onlp_sfpi_dev_read(int port, uint8_t devaddr, uint8_t addr, uint8_t* rdata, int size)
onlp_sfpi_dev_write(int port, uint8_t devaddr, uint8_t addr, uint8_t* data, int size)
Parameter Descriptions:
port: Range from 0 to 47, specifies the port number.devaddr: Device address, fixed to 0x56 for the Marvell PHY device.addr: Register address, range from 0 to 0x1F.value: Register value to write, formatted as (High byte << 8) | (Low byte).rdata: Pointer to the buffer where register values will be read into.data: Pointer to the buffer containing the register values to be written.size: Must be greater than 0 and an even value.