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- Up the version number to 1.0.0
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- Also in generated files
- Remove old files inconsistent with current version.
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gluap committed Jan 2, 2024
1 parent 3d63e3d commit 5163f7e
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Showing 17 changed files with 7,498 additions and 13,579 deletions.
14,248 changes: 6,063 additions & 8,185 deletions OpenBikeSensor/OpenBikeSensor.kicad_pcb

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5 changes: 4 additions & 1 deletion OpenBikeSensor/OpenBikeSensor.kicad_prl
Original file line number Diff line number Diff line change
@@ -1,12 +1,14 @@
{
"board": {
"active_layer": 31,
"active_layer": 36,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_netclasses": [],
"hidden_nets": [],
"high_contrast_mode": 1,
"net_color_mode": 1,
"opacity": {
"images": 0.6,
"pads": 1.0,
"tracks": 1.0,
"vias": 1.0,
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9,
10,
11,
12,
13,
14,
15,
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51 changes: 36 additions & 15 deletions OpenBikeSensor/OpenBikeSensor.kicad_pro
Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
Expand Down Expand Up @@ -142,7 +143,8 @@
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
Expand Down Expand Up @@ -364,7 +366,7 @@
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
Expand All @@ -378,10 +380,10 @@
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
},
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
Expand All @@ -390,26 +392,45 @@
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Power",
"nets": [
"+3.3V",
"+VDC",
"/BAT+",
"/BAT+_FUSED",
"/BAT-",
"/PWR+"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 1.0,
"via_diameter": 1.0,
"via_drill": 0.6,
"wire_width": 6.0
"wire_width": 6
}
],
"meta": {
"version": 2
"version": 3
},
"net_colors": null
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": [
{
"netclass": "Power",
"pattern": "+3.3V"
},
{
"netclass": "Power",
"pattern": "+VDC"
},
{
"netclass": "Power",
"pattern": "/BAT+"
},
{
"netclass": "Power",
"pattern": "/BAT+_FUSED"
},
{
"netclass": "Power",
"pattern": "/BAT-"
},
{
"netclass": "Power",
"pattern": "/PWR+"
}
]
},
"pcbnew": {
"last_paths": {
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