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Releases: openXC7/nextpnr-xilinx

Fix BSCAN placement, use openXC7 metadata

21 Jun 00:04
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This fixes the placement of BSCANE2 primitives,
and switches the nextpnr-xilinx-meta submodule
to the openXC7 version.
The upstream version is missing support for GTP and MMCM.

Fix broken BRAMs, DRIVE attribute

19 Jun 07:15
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Due to changes in GTP support, BRAM initialization has been broken
(bit order flipped). That has been fixed now. Both BRAM and GTP_CHANNEL
now work again.
Also a fix for the DRIVE attribute in IOs has been contributed.

GTP support for Artix7, BUFHCE support, fixes

14 Jun 05:29
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This release adds initial support for GTP Multigigabit Transceivers for Artix7.

Thus the following primitives are now supported:

  • GTPE2_COMMON
  • GTPE2_CHANNEL
  • IBUFDS_GTE2

Support for the following primitives has been implemented:

  • BUFH
  • BUFHCE

The LKTABLE and FILTER parameters of MMCME2_ADV are now correctly calculated,
acording to XAP888.

MMCME2_ADV support, OSERDESE2 fixes, better error messages

15 Dec 03:45
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This release

  • Adds support for the MMCME2_ADV primitive. Integer and fractional scaling has been tested. Dynamic reconfiguration ports have been implemented, but not tested (yet). Please let me know, if you have tried those.
  • Fixes issues in OSERDESE2 (use of the OFB port was not possible)
  • Better error messages (especially if the chip database is out of date)

Bugfix release: Backport to stable codebase

27 Oct 00:51
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Using the latest upstream codebase unfortunately prevented us using router2,
which is often many times faster than router1.
Router2 now is the default router again.
Also some designs stopped working, because the timing of router2 is better.
This release backports all the latest changes on the old, stable codebase,
giving you the best stability and performance.
Further development will be made to both branches,
until the upstream branches' router2 issues (like endless loops),
will be solved.

Implement CFG_CENTER primitives: STARTUPE2, BSCANE2, ICAPE2, DCIRESET, DNA_PORT, EFUSE_USR, FRAME_ECCE2, USR_ACCESSE2

11 Oct 03:08
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The following new primitives of the CFG_CENTER_* tiles are now supported:

  • STARTUPE2
  • BSCANE2
  • ICAPE2
  • DCIRESET
  • DNA_PORT
  • EFUSE_USR
  • FRAME_ECCE2
  • USR_ACCESSE2

Only STARTUPE2 and BSCANE2 have been tested on hardware so far.
Please let me know if you have issues.

Bugfix release: OE line inverted on bidirectional IOs

12 Sep 01:58
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This fixes a critical bug where the output enable line is inverted on bidirectional IOs.
This only surfaces with router1, but since router2 is currently not reliable due to
the upstream backport, this is the current default choice.

support negedge blocks, add TMDS_33 support, fix LVDS_25

02 Aug 20:46
eda6518
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Changes:

  • negative edge flip-flops are supported now, which is important for always(@negedge ..) blocks
  • TMDS_33 IO standard is now supported (important for HDMI)
  • bugfix for LVDS_25 IO standard

DSP48E1 support, Spartan7 support

31 Mar 01:15
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  • Support DSP48E1 hardware multipliers, including cascaded hardware multipliers. It is not feature complete, but now should handle most of portable verilog that is inferred by Yosys.
  • Added Spartan7 support
  • Now router1 is the default router, because router2 has problems routing DSP blocks. It still might work on some designs, though.