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offsoc authored Sep 16, 2024
2 parents 6a99893 + 114143a commit b617eac
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1 change: 1 addition & 0 deletions .gitignore
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Expand Up @@ -24,6 +24,7 @@
*.dwo
*.elf
*.gcno
*.gcda
*.gz
*.i
*.ko
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69 changes: 69 additions & 0 deletions Documentation/admin-guide/hw-vuln/srso.rst
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Expand Up @@ -158,3 +158,72 @@ poisoned BTB entry and using that safe one for all function returns.
In older Zen1 and Zen2, this is accomplished using a reinterpretation
technique similar to Retbleed one: srso_untrain_ret() and
srso_safe_ret().

Checking the safe RET mitigation actually works
-----------------------------------------------

In case one wants to validate whether the SRSO safe RET mitigation works
on a kernel, one could use two performance counters

* PMC_0xc8 - Count of RET/RET lw retired
* PMC_0xc9 - Count of RET/RET lw retired mispredicted

and compare the number of RETs retired properly vs those retired
mispredicted, in kernel mode. Another way of specifying those events
is::

# perf list ex_ret_near_ret

List of pre-defined events (to be used in -e or -M):

core:
ex_ret_near_ret
[Retired Near Returns]
ex_ret_near_ret_mispred
[Retired Near Returns Mispredicted]

Either the command using the event mnemonics::

# perf stat -e ex_ret_near_ret:k -e ex_ret_near_ret_mispred:k sleep 10s

or using the raw PMC numbers::

# perf stat -e cpu/event=0xc8,umask=0/k -e cpu/event=0xc9,umask=0/k sleep 10s

should give the same amount. I.e., every RET retired should be
mispredicted::

[root@brent: ~/kernel/linux/tools/perf> ./perf stat -e cpu/event=0xc8,umask=0/k -e cpu/event=0xc9,umask=0/k sleep 10s

Performance counter stats for 'sleep 10s':

137,167 cpu/event=0xc8,umask=0/k
137,173 cpu/event=0xc9,umask=0/k

10.004110303 seconds time elapsed

0.000000000 seconds user
0.004462000 seconds sys

vs the case when the mitigation is disabled (spec_rstack_overflow=off)
or not functioning properly, showing usually a lot smaller number of
mispredicted retired RETs vs the overall count of retired RETs during
a workload::

[root@brent: ~/kernel/linux/tools/perf> ./perf stat -e cpu/event=0xc8,umask=0/k -e cpu/event=0xc9,umask=0/k sleep 10s

Performance counter stats for 'sleep 10s':

201,627 cpu/event=0xc8,umask=0/k
4,074 cpu/event=0xc9,umask=0/k

10.003267252 seconds time elapsed

0.002729000 seconds user
0.000000000 seconds sys

Also, there is a selftest which performs the above, go to
tools/testing/selftests/x86/ and do::

make srso
./srso
17 changes: 17 additions & 0 deletions Documentation/admin-guide/perf/arm-ni.rst
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@@ -0,0 +1,17 @@
====================================
Arm Network-on Chip Interconnect PMU
====================================

NI-700 and friends implement a distinct PMU for each clock domain within the
interconnect. Correspondingly, the driver exposes multiple PMU devices named
arm_ni_<x>_cd_<y>, where <x> is an (arbitrary) instance identifier and <y> is
the clock domain ID within that particular instance. If multiple NI instances
exist within a system, the PMU devices can be correlated with the underlying
hardware instance via sysfs parentage.

Each PMU exposes base event aliases for the interface types present in its clock
domain. These require qualifying with the "eventid" and "nodeid" parameters
to specify the event code to count and the interface at which to count it
(per the configured hardware ID as reflected in the xxNI_NODE_INFO register).
The exception is the "cycles" alias for the PMU cycle counter, which is encoded
with the PMU node type and needs no further qualification.
16 changes: 8 additions & 8 deletions Documentation/admin-guide/perf/dwc_pcie_pmu.rst
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Expand Up @@ -46,16 +46,16 @@ Some of the events only exist for specific configurations.
DesignWare Cores (DWC) PCIe PMU Driver
=======================================

This driver adds PMU devices for each PCIe Root Port named based on the BDF of
This driver adds PMU devices for each PCIe Root Port named based on the SBDF of
the Root Port. For example,

30:03.0 PCI bridge: Device 1ded:8000 (rev 01)
0001:30:03.0 PCI bridge: Device 1ded:8000 (rev 01)

the PMU device name for this Root Port is dwc_rootport_3018.
the PMU device name for this Root Port is dwc_rootport_13018.

The DWC PCIe PMU driver registers a perf PMU driver, which provides
description of available events and configuration options in sysfs, see
/sys/bus/event_source/devices/dwc_rootport_{bdf}.
/sys/bus/event_source/devices/dwc_rootport_{sbdf}.

The "format" directory describes format of the config fields of the
perf_event_attr structure. The "events" directory provides configuration
Expand All @@ -66,16 +66,16 @@ The "perf list" command shall list the available events from sysfs, e.g.::

$# perf list | grep dwc_rootport
<...>
dwc_rootport_3018/Rx_PCIe_TLP_Data_Payload/ [Kernel PMU event]
dwc_rootport_13018/Rx_PCIe_TLP_Data_Payload/ [Kernel PMU event]
<...>
dwc_rootport_3018/rx_memory_read,lane=?/ [Kernel PMU event]
dwc_rootport_13018/rx_memory_read,lane=?/ [Kernel PMU event]

Time Based Analysis Event Usage
-------------------------------

Example usage of counting PCIe RX TLP data payload (Units of bytes)::

$# perf stat -a -e dwc_rootport_3018/Rx_PCIe_TLP_Data_Payload/
$# perf stat -a -e dwc_rootport_13018/Rx_PCIe_TLP_Data_Payload/

The average RX/TX bandwidth can be calculated using the following formula:

Expand All @@ -88,7 +88,7 @@ Lane Event Usage
Each lane has the same event set and to avoid generating a list of hundreds
of events, the user need to specify the lane ID explicitly, e.g.::

$# perf stat -a -e dwc_rootport_3018/rx_memory_read,lane=4/
$# perf stat -a -e dwc_rootport_13018/rx_memory_read,lane=4/

The driver does not support sampling, therefore "perf record" will not
work. Per-task (without "-a") perf sessions are not supported.
4 changes: 3 additions & 1 deletion Documentation/admin-guide/perf/hisi-pcie-pmu.rst
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Expand Up @@ -28,7 +28,9 @@ The "identifier" sysfs file allows users to identify the version of the
PMU hardware device.

The "bus" sysfs file allows users to get the bus number of Root Ports
monitored by PMU.
monitored by PMU. Furthermore users can get the Root Ports range in
[bdf_min, bdf_max] from "bdf_min" and "bdf_max" sysfs attributes
respectively.

Example usage of perf::

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1 change: 1 addition & 0 deletions Documentation/admin-guide/perf/index.rst
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Expand Up @@ -16,6 +16,7 @@ Performance monitor support
starfive_starlink_pmu
arm-ccn
arm-cmn
arm-ni
xgene-pmu
arm_dsu_pmu
thunderx2-pmu
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2 changes: 2 additions & 0 deletions Documentation/arch/arm64/elf_hwcaps.rst
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Expand Up @@ -365,6 +365,8 @@ HWCAP2_SME_SF8DP2
HWCAP2_SME_SF8DP4
Functionality implied by ID_AA64SMFR0_EL1.SF8DP4 == 0b1.

HWCAP2_POE
Functionality implied by ID_AA64MMFR3_EL1.S1POE == 0b0001.

4. Unused AT_HWCAP bits
-----------------------
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6 changes: 4 additions & 2 deletions Documentation/arch/arm64/silicon-errata.rst
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Expand Up @@ -55,6 +55,8 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| Ampere | AmpereOne | AC03_CPU_38 | AMPERE_ERRATUM_AC03_CPU_38 |
+----------------+-----------------+-----------------+-----------------------------+
| Ampere | AmpereOne AC04 | AC04_CPU_10 | AMPERE_ERRATUM_AC03_CPU_38 |
+----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A510 | #2457168 | ARM64_ERRATUM_2457168 |
+----------------+-----------------+-----------------+-----------------------------+
Expand Down Expand Up @@ -249,8 +251,8 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| Hisilicon | Hip08 SMMU PMCG | #162001800 | N/A |
+----------------+-----------------+-----------------+-----------------------------+
| Hisilicon | Hip08 SMMU PMCG | #162001900 | N/A |
| | Hip09 SMMU PMCG | | |
| Hisilicon | Hip{08,09,10,10C| #162001900 | N/A |
| | ,11} SMMU PMCG | | |
+----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+
| Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
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11 changes: 11 additions & 0 deletions Documentation/dev-tools/gcov.rst
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Expand Up @@ -75,6 +75,17 @@ Only files which are linked to the main kernel image or are compiled as
kernel modules are supported by this mechanism.


Module specific configs
-----------------------

Gcov kernel configs for specific modules are described below:

CONFIG_GCOV_PROFILE_RDS:
Enables GCOV profiling on RDS for checking which functions or
lines are executed. This config is used by the rds selftest to
generate coverage reports. If left unset the report is omitted.


Files
-----

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5 changes: 4 additions & 1 deletion Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml
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Expand Up @@ -137,7 +137,10 @@ patternProperties:
- const: fsl,sec-v4.0-rtic

reg:
maxItems: 1
items:
- description: RTIC control and status register space.
- description: RTIC recoverable error indication register space.
minItems: 1

ranges:
maxItems: 1
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1 change: 1 addition & 0 deletions Documentation/devicetree/bindings/crypto/qcom,prng.yaml
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Expand Up @@ -17,6 +17,7 @@ properties:
- qcom,prng-ee # 8996 and later using EE
- items:
- enum:
- qcom,sa8255p-trng
- qcom,sa8775p-trng
- qcom,sc7280-trng
- qcom,sm8450-trng
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22 changes: 11 additions & 11 deletions Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml
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Expand Up @@ -58,18 +58,18 @@ allOf:
- const: timing-adjustment

amlogic,tx-delay-ns:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 2, 4, 6]
default: 2
description:
The internal RGMII TX clock delay (provided by this driver) in
nanoseconds. Allowed values are 0ns, 2ns, 4ns, 6ns.
When phy-mode is set to "rgmii" then the TX delay should be
explicitly configured. When not configured a fallback of 2ns is
used. When the phy-mode is set to either "rgmii-id" or "rgmii-txid"
the TX clock delay is already provided by the PHY. In that case
this property should be set to 0ns (which disables the TX clock
delay in the MAC to prevent the clock from going off because both
PHY and MAC are adding a delay).
Any configuration is ignored when the phy-mode is set to "rmii".
The internal RGMII TX clock delay (provided by this driver)
in nanoseconds. When phy-mode is set to "rgmii" then the TX
delay should be explicitly configured. When the phy-mode is
set to either "rgmii-id" or "rgmii-txid" the TX clock delay
is already provided by the PHY. In that case this property
should be set to 0ns (which disables the TX clock delay in
the MAC to prevent the clock from going off because both
PHY and MAC are adding a delay). Any configuration is
ignored when the phy-mode is set to "rmii".

amlogic,rx-delay-ns:
deprecated: true
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2024 Amlogic, Inc. All rights reserved
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/bluetooth/amlogic,w155s2-bt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Amlogic Bluetooth chips

description:
The W155S2 is an Amlogic Bluetooth and Wi-Fi combo chip. It works on
the standard H4 protocol via a 4-wire UART interface, with baud rates
up to 4 Mbps.

maintainers:
- Yang Li <[email protected]>

properties:
compatible:
oneOf:
- items:
- enum:
- amlogic,w265s1-bt
- amlogic,w265p1-bt
- const: amlogic,w155s2-bt
- enum:
- amlogic,w155s2-bt
- amlogic,w265s2-bt

clocks:
maxItems: 1
description: clock provided to the controller (32.768KHz)

enable-gpios:
maxItems: 1

vddio-supply:
description: VDD_IO supply regulator handle

firmware-name:
maxItems: 1
description: specify the path of firmware bin to load

required:
- compatible
- clocks
- enable-gpios
- vddio-supply
- firmware-name

additionalProperties: false

examples:
- |
#include <dt-bindings/gpio/gpio.h>
bluetooth {
compatible = "amlogic,w155s2-bt";
clocks = <&extclk>;
enable-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
vddio-supply = <&wcn_3v3>;
firmware-name = "amlogic/aml_w155s2_bt_uart.bin";
};
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Expand Up @@ -172,14 +172,14 @@ allOf:
- qcom,wcn6855-bt
then:
required:
- enable-gpios
- swctrl-gpios
- vddio-supply
- vddbtcxmx-supply
- vddrfacmn-supply
- vddaon-supply
- vddwlcx-supply
- vddwlmx-supply
- vddbtcmx-supply
- vddrfa0p8-supply
- vddrfa1p2-supply
- vddrfa1p7-supply
- vddrfa1p8-supply
- if:
properties:
compatible:
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8 changes: 5 additions & 3 deletions Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
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Expand Up @@ -17,6 +17,7 @@ properties:
compatible:
oneOf:
- enum:
- fsl,imx95-flexcan
- fsl,imx93-flexcan
- fsl,imx8qm-flexcan
- fsl,imx8mp-flexcan
Expand All @@ -38,9 +39,6 @@ properties:
- fsl,imx6ul-flexcan
- fsl,imx6sx-flexcan
- const: fsl,imx6q-flexcan
- items:
- const: fsl,imx95-flexcan
- const: fsl,imx93-flexcan
- items:
- enum:
- fsl,ls1028ar1-flexcan
Expand Down Expand Up @@ -80,6 +78,10 @@ properties:
node then controller is assumed to be little endian. If this property is
present then controller is assumed to be big endian.
can-transceiver:
$ref: can-transceiver.yaml#
unevaluatedProperties: false

fsl,stop-mode:
description: |
Register bits of stop mode control.
Expand Down
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