Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Move tests with fixed ci #14

Open
wants to merge 120 commits into
base: dev
Choose a base branch
from
Open
Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
120 commits
Select commit Hold shift + click to select a range
a53b00e
ci: update iverilog
numero-744 Dec 18, 2022
f147fd1
ci: just install verilog
numero-744 Dec 18, 2022
cacd0d6
refactor: move CocotbBase to tester/main
numero-744 Dec 4, 2022
6480f87
refactor: rename AhbLite3CrossbarFactory.scala
numero-744 Dec 4, 2022
fa28284
refactor: move AhbLite3CrossbarTester
numero-744 Dec 4, 2022
2d23372
refactor: move AhbLite3OnChipRamTester
numero-744 Dec 4, 2022
8e72b6c
refactor: move Axi4AdapterTester
numero-744 Dec 4, 2022
a9ff139
refactor: move Axi4CrossbarTester
numero-744 Dec 4, 2022
abbe6d8
refactor: move Apb3I2cSlaveTester
numero-744 Dec 4, 2022
5788091
refactor: move Apb3SpiMasterCtrlTester
numero-744 Dec 4, 2022
7c5ebbf
refactor: move Apb3SpiSlaveCtrlTester
numero-744 Dec 4, 2022
a262e98
refactor: move Axi4CrossbarTester2
numero-744 Dec 4, 2022
84e60e4
refactor: move Axi4SharedSdramCtrlTesterCocotbBoot
numero-744 Dec 4, 2022
f249505
refactor: move Axi4SlaveFactoryTester
numero-744 Dec 4, 2022
d4bc8b8
refactor: move Axi4StreamSimpleWidthAdapterTester
numero-744 Dec 4, 2022
29a3331
refactor: move Axi4StreamTester
numero-744 Dec 4, 2022
d2d646d
refactor: move Axi4StreamWidthAdapterTester
numero-744 Dec 4, 2022
9816b75
refactor: move AxiLite4SlaveFactoryTester
numero-744 Dec 4, 2022
7aee70c
build: add test dependencies to core
numero-744 Dec 4, 2022
bdddf82
refactor: mv more tester/test to tester/main
numero-744 Dec 4, 2022
b3cfcbf
refactor: move BlackboxTester
numero-744 Dec 4, 2022
e967100
refactor: move LatchTester
numero-744 Dec 4, 2022
6c09452
refactor: move BundleTester
numero-744 Dec 4, 2022
983aa88
refactor: move WhenTester
numero-744 Dec 4, 2022
646e2ff
refactor: move UartTester
numero-744 Dec 4, 2022
e69f1b6
refactor: move SpinalTesterGhdlBase to tester/main
numero-744 Dec 5, 2022
5e2cb35
refactor: move StreamTester
numero-744 Dec 5, 2022
2a2a301
refactor: move StreamTester2
numero-744 Dec 5, 2022
828bd6c
refactor: move MemTester
numero-744 Dec 5, 2022
b726221
refactor: move InOutTester
numero-744 Dec 5, 2022
5d543ee
refactor: move GrayCounterTester
numero-744 Dec 5, 2022
ec9a1b6
refactor: move UsbDeviceCtrlTester
numero-744 Dec 5, 2022
d1b7410
refactor: remove empty files
numero-744 Dec 5, 2022
411933c
refactor: move SdramCtrlTester
numero-744 Dec 5, 2022
f61be71
refactor: move I2cSlaveTester
numero-744 Dec 5, 2022
c47ca39
refactor: remove useless file
numero-744 Dec 5, 2022
a7c8236
refactor: move SerdesSerialTester
numero-744 Dec 5, 2022
81249ea
refactor: move RomTester
numero-744 Dec 5, 2022
a90b699
refactor: move Axi4SharedOnChipRamTester
numero-744 Dec 5, 2022
bec4255
refactor: move Axi4SimAgentTester
numero-744 Dec 7, 2022
61794c3
refactor: move Axi4UnburstTester
numero-744 Dec 7, 2022
fc835db
refactor: CheckTester -> GenerationShould fail ...
numero-744 Dec 7, 2022
a37769b
refactor: move ClockDomainConfigTester
numero-744 Dec 7, 2022
3250f01
refactor: move FixedPointTester
numero-744 Dec 7, 2022
fdd8097
refactor: move FloatingTester
numero-744 Dec 8, 2022
ca59d37
refactor: move FormalArbiterTester
numero-744 Dec 8, 2022
16737c9
refactor: move FormalDeMuxTester
numero-744 Dec 8, 2022
21f66b4
refactor: move FormalDispatcherSequencialTester
numero-744 Dec 8, 2022
7cc85b5
refactor: move FormalFifoCCTester
numero-744 Dec 8, 2022
ecbeccb
refactor: move FormalFifoTester
numero-744 Dec 8, 2022
93238d7
refactor: move FormalForkTester
numero-744 Dec 8, 2022
c63130f
refactor: move FormalHistoryModifyableTester
numero-744 Dec 8, 2022
c0eea48
refactor: move FormalJoinTester
numero-744 Dec 8, 2022
1c45776
refactor: move FormalMuxTester
numero-744 Dec 8, 2022
e069999
refactor: move FormalStreamExtender
numero-744 Dec 8, 2022
119bcee
refactor: move Issue963
numero-744 Dec 10, 2022
cf3e99c
refactor: move MultiClockTester
numero-744 Dec 10, 2022
ad68825
refactor: move PDMTester
numero-744 Dec 10, 2022
2788d7d
refactor: move PinsecTester
numero-744 Dec 11, 2022
8652fa3
refactor: move SimBigIntPimperTest
numero-744 Dec 11, 2022
408004a
refactor: move Pr990
numero-744 Dec 11, 2022
0fcb8d9
refactor: rename issues -> fixes
numero-744 Dec 11, 2022
76fbeda
refactor: move SpinalSimApbI2C
numero-744 Dec 11, 2022
766e505
refactor: move SpinalSimAFixTester
numero-744 Dec 11, 2022
78aa0d3
refactor: move SpinalSimAccessSubComponents
numero-744 Dec 11, 2022
e6ba7a0
refactor: move SpinalSimClockDomainTest
numero-744 Dec 11, 2022
de69606
refactor: move SpinalSimMacTester
numero-744 Dec 11, 2022
87a1a68
refactor: move SpinalSimStreamWidthAdapterTester
numero-744 Dec 11, 2022
a2fd612
refactor: move SpinalSimLibTester
numero-744 Dec 11, 2022
2baee9c
refactor: move SpinalSimWishboneAdapterTester
numero-744 Dec 11, 2022
9f27b83
refactor: move SpinalSimWishboneArbiterTester
numero-744 Dec 11, 2022
33000a5
refactor: move SpinalSimWishboneDecoderTester
numero-744 Dec 11, 2022
65e6e9b
refactor: move SpinalSimWishboneSimInterconTester
numero-744 Dec 11, 2022
083b7ac
refactor: move SpinalSimWishboneSlaveFactoryTester
numero-744 Dec 11, 2022
ce448b2
refactor: move SpinalSimWishboneSimTester
numero-744 Dec 11, 2022
5eea071
refactor: move SpinalSimStreamExtenderTester
numero-744 Dec 11, 2022
0832dbe
refactor: move SpinalSimStreamFifoCCTester
numero-744 Dec 11, 2022
2d7be51
refactor: move SpinalSimStreamFifoMultiChannelSharedSpaceTester
numero-744 Dec 11, 2022
678a472
refactor: move SpinalSimStreamFifoTester
numero-744 Dec 11, 2022
3ab5dcd
refactor: move SpinalSimPhaseTester
numero-744 Dec 11, 2022
0e9c990
refactor: move SpinalSimOneEntryRamTester
numero-744 Dec 11, 2022
7da9e5e
refactor: move SpinalSimPackedBundleTester
numero-744 Dec 11, 2022
8fbd62a
refactor: move SpinalSimBmbAlignerTester
numero-744 Dec 11, 2022
f45392d
refactor: move SpinalSimBmbDecoderOutOfOrderTester
numero-744 Dec 11, 2022
0372648
refactor: move SpinalSimBmbDownSizerBridgeTester
numero-744 Dec 11, 2022
e137130
refactor: move SpinalSimBmbExclusiveMonitorTester
numero-744 Dec 11, 2022
2340180
refactor: move SpinalSimBmbInterconnectGeneratorTester
numero-744 Dec 11, 2022
5876f60
refactor: move SpinalSimBmbLengthFixerTester
numero-744 Dec 11, 2022
dab5ce5
refactor: move SpinalSimBmbLengthSpliterTester
numero-744 Dec 11, 2022
cdf3221
refactor: move SpinalSimBmbOnChipRamTester
numero-744 Dec 11, 2022
be3dcb0
refactor: move SpinalSimBmbToApb3BridgeTester
numero-744 Dec 11, 2022
82f5b67
refactor: move SpinalSimBmbUnburstifyTester
numero-744 Dec 11, 2022
b614849
refactor: move SpinalSimBmbUpSizerBridgeTester
numero-744 Dec 11, 2022
ee59213
refactor: move SimRandomizeTester
numero-744 Dec 11, 2022
7f9407c
refactor: move SpinalSimRamAccessTester
numero-744 Dec 11, 2022
136f276
refactor: move AvalonSTTester
numero-744 Dec 11, 2022
8f96b81
refactor: move Encoding8b10bTest
numero-744 Dec 11, 2022
8077057
refactor: move SpinalSimBsbTester
numero-744 Dec 11, 2022
16f40f1
refactor: move ZeroWidthTester
numero-744 Dec 11, 2022
5219439
refactor: move SpinalSimPlicTester
numero-744 Dec 11, 2022
3002c11
refactor: remove SpinalSimPerfTester
numero-744 Dec 11, 2022
2cc0917
refactor: move SpinalSimSigmaDeltaTester
numero-744 Dec 11, 2022
c98bc2d
refactor: move CoreMiscTester
numero-744 Dec 11, 2022
c0ab095
refactor: move RegIfAxiLite4Tester
numero-744 Dec 12, 2022
ab7264e
refactor: move BusSlaveFactoryDoubleReadTester
numero-744 Dec 12, 2022
5e274a7
refactor: move CommonTester
numero-744 Dec 12, 2022
39e7d8e
refactor: move LibTester
numero-744 Dec 12, 2022
07a9be2
refactor: move FormalAxi4DownsizerTester
numero-744 Dec 12, 2022
45291d7
refactor: move FormalSimpleTester
numero-744 Dec 12, 2022
376c5df
refactor: move InternalClockTester
numero-744 Dec 12, 2022
63bad53
refactor: remove some demo stuff
numero-744 Dec 15, 2022
659930f
refactor: move OperatorTester
numero-744 Dec 15, 2022
11f0df1
refactor: move PllAAssertSDeassertTester
numero-744 Dec 15, 2022
3e39175
refactor: move VerilatorCacheTester
numero-744 Dec 15, 2022
1818d5f
refactor: move SpinalSimVerilatorIoTest
numero-744 Dec 15, 2022
2eab15c
refactor: move SpinalSimMultiThreadingTest
numero-744 Dec 15, 2022
f541bd3
refactor: move SpinalSimSpiXdrMaster
numero-744 Dec 16, 2022
9d9af89
refactor: move SpinalSimDmaSgTester
numero-744 Dec 18, 2022
4f36efa
refactor: move SpinalSimUsbHostTester
numero-744 Dec 18, 2022
62ca960
refactor: move SdramXdrSdrSpinalSim
numero-744 Dec 18, 2022
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
37 changes: 36 additions & 1 deletion .scalafmt.conf
Original file line number Diff line number Diff line change
@@ -1,5 +1,40 @@
version = 3.6.0
runner.dialect = scala212
align.preset = some
maxColumn = 120
align.tokens."+" = [
{
code = "="
owners = [{
regex = "Defn\\.Val"
}]
}
{
code = ":="
owners = [{
regex = "Term\\.ApplyInfix"
parents = ["Term\\.Block|Template"]
}]
}
{
code = "#="
owners = [{
regex = "Term\\.ApplyInfix"
parents = ["Term\\.Block|Template"]
}]
}
{
code = "port"
owners = [{
regex = "Term\\.ApplyInfix"
parents = ["Defn\\.Val"]
}]
}
{
code = "->"
owners = [{
regex = "Term\\.ApplyInfix"
}]
}
]
docstrings.wrap = no
docstrings.oneline = fold
15 changes: 8 additions & 7 deletions build.sbt
Original file line number Diff line number Diff line change
Expand Up @@ -126,14 +126,16 @@ val defaultSettingsWithPlugin = defaultSettings ++ Seq(
}.value
)

lazy val core = (project in file("core"))
lazy val core: Project = (project in file("core"))
.dependsOn(idslplugin)
.settings(
defaultSettingsWithPlugin,
name := "SpinalHDL-core",
libraryDependencies += "org.scala-lang" % "scala-reflect" % scalaVersion.value,
libraryDependencies += "com.github.scopt" %% "scopt" % "3.7.1",
libraryDependencies += "com.lihaoyi" %% "sourcecode" % "0.2.7",
Test / unmanagedClasspath ++= (LocalProject("tester") / Compile / fullClasspath).value,
Test / unmanagedClasspath ++= (LocalProject("lib") / Compile / fullClasspath).value,

resolvers += Resolver.sonatypeRepo("public"),
version := SpinalVersion.core,
Expand All @@ -153,18 +155,17 @@ lazy val core = (project in file("core"))
)
.dependsOn(sim)

lazy val lib = (project in file("lib"))
lazy val lib: Project = (project in file("lib"))
.settings(
defaultSettingsWithPlugin,
name := "SpinalHDL-lib",
libraryDependencies += "commons-io" % "commons-io" % "2.4",
version := SpinalVersion.lib
version := SpinalVersion.lib,
Test / unmanagedClasspath ++= (LocalProject("tester") / Compile / fullClasspath).value
)
.dependsOn (sim, core)
.dependsOn(sim, core)



lazy val tester = (project in file("tester"))
lazy val tester: Project = (project in file("tester"))
.settings(
defaultSettingsWithPlugin,
name := "SpinalHDL-tester",
Expand Down
2 changes: 1 addition & 1 deletion core/src/main/scala/spinal/core/Vec.scala
Original file line number Diff line number Diff line change
Expand Up @@ -311,7 +311,7 @@ class VecBitwisePimper[T <: Data with BitwiseOp[T]](pimped : Vec[T]) extends Bit

private def map2with(f: (T, T) => T)(other: Vec[T]): Vec[T] = {
if (pimped.length != other.length)
SpinalError(s"Cannot apply a bitwize opration on vectors with different size (${pimped.length} vs ${other.length})")
SpinalError(s"Cannot apply a bitwize operation on vectors with different sizes (${pimped.length} vs ${other.length})")
Vec((pimped, other).zipped.map(f))
}
}
115 changes: 115 additions & 0 deletions core/src/test/scala/integration/CommonTester.scala
Original file line number Diff line number Diff line change
@@ -0,0 +1,115 @@
package integration

import spinal.tester.SpinalTesterCocotbBase

import spinal.core._

object CommonTester {
class BundleA() extends Bundle {
val bod = new Bundle {
val gggg = Bool()
val aosi = UInt(3 bit)
}
val ahe = Bool()
val zwg = Bool()
}

case class BundleAA() extends BundleA {
val vsw = Bool()
val lwee = UInt(5 bit)
}

case class CommonTester() extends Component {
val io = new Bundle {
val conds = in port Vec(Bool(), 8)

val inUIntA = in port UInt(8 bit)
val inUIntB = in port UInt(8 bit)
val outUIntAdder = out port UInt()

val inAA = in port BundleAA()
val inAABits = in port Bits(BundleAA().getBitsWidth bit)
val outAA = out port BundleAA()
val outAABits = out port Bits(BundleAA().getBitsWidth bit)

val complexLiteral = out port UInt(16 bit)

val assign = new Bundle {
val sel = in port Vec(UInt(4 bit), 4)
val bitDemux = out port Bits(16 bit)

def doIt(): Unit = {
bitDemux := B(0)
bitDemux(sel(0)) := conds(0)

when(conds(1)) {
bitDemux(sel(1)) := conds(2)
} elsewhen (conds(3)) {
bitDemux(sel(0)) := conds(4)
}

when(conds(5)) {
bitDemux(sel(1)) := conds(6)
}

bitDemux(5) := True
}
}

def doIt(): Unit = {
assign.doIt()
}
}

io.doIt()

io.outAA.assignFromBits(io.inAABits)
io.outAABits := io.inAA.asBits

io.complexLiteral(15 downto 4) := 0x70
io.complexLiteral(15 downto 12) := (U(2) + U(1)).resized
io.complexLiteral(6) := True
io.complexLiteral(3) := True
io.complexLiteral(5) := True
io.complexLiteral(3 downto 0) := 2
io.complexLiteral(13) := False

def combAdderFunc(x: UInt, y: UInt): UInt = {
val ret = UInt(widthOf(x) max widthOf(y) bits)
val size = io.inUIntA.getWidth

var c = False
for (i <- 0 until size) {
val a = x(i)
val b = y(i)
ret(i) := a ^ b ^ c
c \= (a & b) | (a & c) | (b & c)
}

ret
}

io.outUIntAdder := combAdderFunc(io.inUIntA, io.inUIntB)

// Clone test
case class MyBundle(paramBool: Bool, asd: Int) extends Bundle {
val a = cloneOf(paramBool)
}

case class MyBundle2() extends Bundle {
val a = Bool()
}

cloneOf(MyBundle(True, 1))
cloneOf(MyBundle2())
}
}

class CommonTesterCocotbBoot extends SpinalTesterCocotbBase {
override def getName: String = "CommonTester"

override def createToplevel: Component = new CommonTester.CommonTester

override def pythonTestLocation: String =
"tester/src/test/python/spinal/CommonTester"
}
Original file line number Diff line number Diff line change
@@ -1,26 +1,8 @@
/*
* SpinalHDL
* Copyright (c) Dolu, All rights reserved.
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 3.0 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library.
*/

package spinal.tester.scalatest
package integration

import spinal.tester.SpinalTesterCocotbBase

import spinal.core._
import spinal.lib._
import spinal.tester.scalatest.OperatorTester.OperatorTester

object OperatorTester {
object State extends SpinalEnum{
Expand Down Expand Up @@ -295,7 +277,7 @@ object OperatorTester {

class OperatorTesterCocotbBoot extends SpinalTesterCocotbBase {
override def getName: String = "OperatorTester"
override def createToplevel: Component = new OperatorTester.OperatorTester
override def createToplevel: Component = new OperatorTester.OperatorTester
override def pythonTestLocation: String = "tester/src/test/python/spinal/OperatorTester"
}

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -16,16 +16,15 @@
* License along with this library.
*/

package spinal.tester.scalatest
package integration

import spinal.tester.SpinalTesterCocotbBase

import spinal.core._
import spinal.lib._

import scala.io.Source

object ZeroWidthTester {


class ZeroWidthTester extends Component {
val uint8 = in UInt(8 bits)
val sint8 = in SInt(8 bits)
Expand All @@ -51,8 +50,6 @@ object ZeroWidthTester {
val sint08ShiftLeftUint = out(sint0 << uint8)
val bits08ShiftLeftUint = out(bits0 << uint8)



val uint08Equals = out(uint0 === uint8)
val uint08NotEquals = out(uint0 =/= uint8)

Expand All @@ -69,7 +66,6 @@ object ZeroWidthTester {
val uint08Bigger = out(uint0 > uint8)
val uint08BiggerEquals = out(uint0 >= uint8)


val sint08Equals= out(sint0 === sint8)
val sint08NotEquals = out(sint0 =/= sint8)

Expand All @@ -86,16 +82,13 @@ object ZeroWidthTester {
val sint08Bigger = out(sint0 > sint8)
val sint08BiggerEquals = out(sint0 >= sint8)



val bits08Equals= out(0 === bits8)
val bits08NotEquals = out(0 =/= bits8)

val bits08And = out(bits0.resized & bits8)
val bits08Or = out(bits0.resized | bits8)
val bits08Xor = out(bits0.resized ^ bits8)


val uint80ShiftLeftUint = out(uint8 >> uint0)
val sint80ShiftLeftUint = out(sint8 >> uint0)
val bits80ShiftLeftUint = out(bits8 >> uint0)
Expand Down Expand Up @@ -139,14 +132,12 @@ object ZeroWidthTester {
val bits80Or = out(bits8 | bits0.resized)
val bits80Xor = out(bits8 ^ bits0.resized)


val bitsResizeBigger = out(bits0.resize(16))
val uintResizeBigger = out(uint0.resize(16))
val sintResizeBigger = out(sint0.resize(16))

val bits08Cat = out(bits0 ## bits8)
val bits80Cat = out(bits8 ## bits0)

}
}

Expand Down Expand Up @@ -174,4 +165,4 @@ class ZeroWidthTesterCocotbBoot extends SpinalTesterCocotbBase {
}
}
}
}
}
Original file line number Diff line number Diff line change
@@ -1,9 +1,8 @@
package spinal.tester.scalatest
package spinal.core

import spinal.core._
import org.scalatest.funsuite.AnyFunSuite
import spinal.core.sim._

import org.scalatest.funsuite.AnyFunSuite
import java.math.MathContext
import scala.collection.mutable
import scala.math.BigDecimal.RoundingMode
Expand Down
34 changes: 34 additions & 0 deletions core/src/test/scala/spinal/core/Area.scala
Original file line number Diff line number Diff line change
@@ -0,0 +1,34 @@
package spinal.core

import org.scalatest.funsuite.AnyFunSuite

import spinal.core.sim._

class AreaTester extends AnyFunSuite {
test("SlowArea") {
SimConfig
.withConfig(
SpinalConfig(defaultClockDomainFrequency = FixedFrequency(4000 Hz))
)
.compile(new Component {
val counter = out(RegInit(U"0000"))
counter := counter + 1
assert(clockDomain.samplingRate.getValue.toInt == 4000)

val slowArea = new SlowArea(4) {
val counter = out(RegInit(U"0000"))
counter := counter + 1
assert(clockDomain.samplingRate.getValue.toInt == 1000)
}
})
.doSim { dut =>
dut.clockDomain.forkStimulus(10)

for (i <- 0 until 1000) {
dut.clockDomain.waitSampling()
assert(dut.counter.toInt == i % 16)
assert(dut.slowArea.counter.toInt == (i - 1) / 4 % 16)
}
}
}
}
Loading