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Extend CoreNEURON POINTER transfer to any RANGE variable in a NRN_THREAD #1622

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bc13be3
CoreNEURON POINTER transfer to any RANGE variable
nrnhines Jan 23, 2022
9b99097
logic error about whether there are any trajectories for a thread.
nrnhines Jan 23, 2022
cd634d4
update coreneuron latest hines/POINTER-to-RANGE
nrnhines Jan 26, 2022
1c988d5
test of non-voltage POINTER
nrnhines Feb 4, 2022
99715b5
test of POINTER transfer and coreneuron.cell_permute = 1
nrnhines Feb 7, 2022
7d726c8
Update CoreNEURON submodule to latest hines/POINTER-to-RANGE.
olupton Feb 11, 2022
27f7a26
Merge branch 'master' into hines/POINTER-to-RANGE
alexsavulescu Feb 11, 2022
f8c56d9
Merge branch 'master' into hines/POINTER-to-RANGE
nrnhines Feb 24, 2022
328630d
Merge branch 'master' into hines/POINTER-to-RANGE
nrnhines Feb 25, 2022
ed29336
update coreneuron (awaiting pointer2type for checkpoint and test)
nrnhines Feb 26, 2022
c008bef
update coreneuron
nrnhines Feb 27, 2022
dc8a2a9
Merge branch 'master' into hines/POINTER-to-RANGE
nrnhines Feb 28, 2022
e24c05d
update coreneuron. starting a test for file mode transfer.
nrnhines Mar 2, 2022
f88f823
CoreNEURON file mode checkpoint test for POINTER
nrnhines Mar 4, 2022
61f7205
update coreneuron. cell_permute=1 works for POINTER and checkpoint
nrnhines Mar 5, 2022
7275c8f
Augment path used by ctest with ${PROJECT_BINARY_DIR}/bin
nrnhines Mar 5, 2022
1665fb9
update coreneuron
nrnhines Mar 5, 2022
5c6cd3c
Merge branch 'master' into hines/POINTER-to-RANGE
nrnhines Mar 5, 2022
96415b3
update coreneuron submodule
pramodk Mar 7, 2022
99f015e
Apply suggestions from code review
alexsavulescu Mar 7, 2022
d41802f
Merge branch 'master' into hines/POINTER-to-RANGE
alexsavulescu Mar 7, 2022
f7be90f
print more information if subprocess.run fails
nrnhines Mar 8, 2022
f56b7ca
Merge branch 'master' into hines/POINTER-to-RANGE
nrnhines Mar 8, 2022
4a0d025
Merge branch 'master' into hines/POINTER-to-RANGE
nrnhines Mar 8, 2022
52f5b56
Fix similar to #1619 for pointer test: sonata env var required for co…
pramodk Mar 9, 2022
c823fbf
Update coreneuron submodule
pramodk Mar 9, 2022
70c9569
update coreneuron
nrnhines Mar 10, 2022
9b1c22d
update coreneuron submodule to latest master
pramodk Mar 10, 2022
9abfdb9
Merge branch 'master' into hines/POINTER-to-RANGE
alexsavulescu Mar 10, 2022
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2 changes: 1 addition & 1 deletion cmake/NeuronTestHelper.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -389,7 +389,7 @@ function(nrn_add_test)
${test_names}
PROPERTIES
ENVIRONMENT
"${NRN_TEST_ENV};PATH=${nrnivmodl_working_directory}/${CMAKE_HOST_SYSTEM_PROCESSOR}:$ENV{PATH};CORENEURONLIB=${nrnivmodl_working_directory}/${CMAKE_HOST_SYSTEM_PROCESSOR}/libcorenrnmech${CMAKE_SHARED_LIBRARY_SUFFIX}"
"${NRN_TEST_ENV};PATH=${nrnivmodl_working_directory}/${CMAKE_HOST_SYSTEM_PROCESSOR}:${PROJECT_BINARY_DIR}/bin:$ENV{PATH};CORENEURONLIB=${nrnivmodl_working_directory}/${CMAKE_HOST_SYSTEM_PROCESSOR}/libcorenrnmech${CMAKE_SHARED_LIBRARY_SUFFIX}"
)

# Construct an expression containing the names of the test output files that will be passed to the
Expand Down
2 changes: 1 addition & 1 deletion external/coreneuron
Submodule coreneuron updated 42 files
+12 −3 .github/pull_request_template.md
+3 −3 .github/workflows/test-as-submodule.yml
+2 −0 .gitlab-ci.yml
+11 −1 coreneuron/CMakeLists.txt
+3 −1 coreneuron/io/nrn2core_direct.h
+74 −29 coreneuron/io/nrn_checkpoint.cpp
+78 −4 coreneuron/io/phase2.cpp
+1 −0 coreneuron/io/phase2.hpp
+3 −2 coreneuron/mechanism/eion.cpp
+117 −9 coreneuron/permute/node_permute.cpp
+2 −0 coreneuron/permute/node_permute.h
+1 −1 coreneuron/sim/fadvance_core.cpp
+5 −4 coreneuron/sim/finitialize.cpp
+2 −2 coreneuron/utils/nrnoc_aux.cpp
+27 −3 coreneuron/utils/randoms/nrnran123.cu
+8 −8 tests/integration/README.md
+ tests/integration/ring/18_1.dat
+ tests/integration/ring/18_2.dat
+ tests/integration/ring/18_3.dat
+ tests/integration/ring/19_1.dat
+ tests/integration/ring/19_2.dat
+ tests/integration/ring/19_3.dat
+2 −2 tests/integration/ring/bbcore_mech.dat
+ tests/integration/ring/byteswap1.dat
+0 −1 tests/integration/ring/dict
+4 −4 tests/integration/ring/files.dat
+1 −1 tests/integration/ring/globals.dat
+ tests/integration/ring_gap/12_1.dat
+ tests/integration/ring_gap/13_1.dat
+ tests/integration/ring_gap/18_1.dat
+ tests/integration/ring_gap/18_2.dat
+ tests/integration/ring_gap/18_3.dat
+ tests/integration/ring_gap/18_gap.dat
+ tests/integration/ring_gap/19_1.dat
+ tests/integration/ring_gap/19_2.dat
+ tests/integration/ring_gap/19_3.dat
+ tests/integration/ring_gap/19_gap.dat
+2 −2 tests/integration/ring_gap/bbcore_mech.dat
+ tests/integration/ring_gap/byteswap1.dat
+0 −1 tests/integration/ring_gap/dict
+4 −4 tests/integration/ring_gap/files.dat
+1 −1 tests/integration/ring_gap/globals.dat
16 changes: 8 additions & 8 deletions src/nrncvode/netcvode.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -5752,14 +5752,14 @@ int& n_trajec, int*& types, int*& indices, double**& pvars, double**& varrays) {
}
}
}
if (n_trajec == 0) { // if errors reduced to 0, clean up
assert(n_pr == 0);
if (types) { delete [] types; types = NULL; }
if (indices) { delete [] indices; indices = NULL; }
if (vpr) { delete [] vpr; vpr = NULL; }
if (varrays) { delete [] varrays; varrays = NULL; }
if (pvars) { delete [] pvars; pvars = NULL; }
}
}
if (n_trajec == 0) { // if errors reduced to 0, clean up
assert(n_pr == 0);
if (types) { delete [] types; types = NULL; }
if (indices) { delete [] indices; indices = NULL; }
if (vpr) { delete [] vpr; vpr = NULL; }
if (varrays) { delete [] varrays; varrays = NULL; }
if (pvars) { delete [] pvars; pvars = NULL; }
}
#if 0
printf("nrnthread_get_trajectory_requests tid=%d bsize=%d n_pr=%d n_trajec=%d\n", tid, bsize, n_pr, n_trajec);
Expand Down
27 changes: 19 additions & 8 deletions src/nrniv/nrncore_write/callbacks/nrncore_callbacks.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@
#include "nrncvode.h"
#include "nrniv_mf.h"
#include "hocdec.h"
#include "nrncore_write/utils/nrncore_utils.h"
#include "nrncore_write/data/cell_group.h"
#include "nrncore_write/io/nrncore_io.h"
#include "parse.hpp"
Expand Down Expand Up @@ -323,7 +324,7 @@ int nrnthread_dat2_2(int tid, int*& v_parent_index, double*& a, double*& b,
}

int nrnthread_dat2_mech(int tid, size_t i, int dsz_inst, int*& nodeindices,
double*& data, int*& pdata) {
double*& data, int*& pdata, std::vector<int>& pointer2type) {

if (tid >= nrn_nthread) { return 0; }
CellGroup& cg = cellgroups_[tid];
Expand Down Expand Up @@ -367,7 +368,7 @@ int nrnthread_dat2_mech(int tid, size_t i, int dsz_inst, int*& nodeindices,
sz = bbcore_dparam_size[type]; // nrn_prop_dparam_size off by 1 if cvode_ieq.
if (sz) {
int* pdata1;
pdata1 = datum2int(type, ml, nt, cg, cg.datumindices[dsz_inst], vdata_offset);
pdata1 = datum2int(type, ml, nt, cg, cg.datumindices[dsz_inst], vdata_offset, pointer2type);
if (copy) {
int nn = n*sz;
for (int i=0; i < nn; ++i) {
Expand Down Expand Up @@ -498,25 +499,38 @@ int core2nrn_corepointer_mech(int tid, int type,
return 1;
}

int* datum2int(int type, Memb_list* ml, NrnThread& nt, CellGroup& cg, DatumIndices& di, int ml_vdata_offset) {
int* datum2int(int type, Memb_list* ml, NrnThread& nt, CellGroup& cg, DatumIndices& di, int ml_vdata_offset, std::vector<int>& pointer2type) {
int isart = nrn_is_artificial_[di.type];
int sz = bbcore_dparam_size[type];
int* pdata = new int[ml->nodecount * sz];
int* semantics = memb_func[type].dparam_semantics;
for (int i=0; i < ml->nodecount; ++i) {
int ioff = i*sz;
for (int j = 0; j < sz; ++j) {
int jj = ioff + j;
int etype = di.ion_type[jj];
int eindex = di.ion_index[jj];
if (etype == -1) {
int seman = semantics[j];
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// Would probably be more clear if use seman for as many as
// possible of the cases
// below and within each case deal with etype appropriately.
// ion_type and ion_index have become misnomers as they no longer
// refer to ions specificially but the mechanism type where the
// range variable lives (and otherwise is generally the same as
// seman). And ion_index refers to the index of the range variable
// within the mechanism (or voltage, area, etc.)
if (seman == -5) { // POINTER to range variable (e.g. voltage)
pdata[jj] = eindex;
pointer2type.push_back(etype);
}else if (etype == -1) {
if (isart) {
pdata[jj] = -1; // maybe save this space eventually. but not many of these in bb models
}else{
pdata[jj] = eindex;
}
}else if (etype == -9) {
pdata[jj] = eindex;
}else if (etype > 0 && etype < 1000){//ion pointer and also POINTER
}else if (etype > 0 && etype < 1000){//ion pointer
pdata[jj] = eindex;
}else if (etype > 1000 && etype < 2000) { //ionstyle can be explicit instead of pointer to int*
pdata[jj] = eindex;
Expand All @@ -531,9 +545,6 @@ int* datum2int(int type, Memb_list* ml, NrnThread& nt, CellGroup& cg, DatumIndic
}else if (etype == -7) { // bbcorepointer
pdata[jj] = ml_vdata_offset + eindex;
//printf("etype %d jj=%d eindex=%d pdata=%d\n", etype, jj, eindex, pdata[jj]);
}else if (etype == -5) { // POINTER to voltage
pdata[jj] = eindex;
//printf("etype %d\n", etype);
}else{ //uninterpreted
assert(eindex != -3); // avoided if last
pdata[jj] = 0;
Expand Down
4 changes: 2 additions & 2 deletions src/nrniv/nrncore_write/callbacks/nrncore_callbacks.h
Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,7 @@ int nrnthread_dat2_1(int tid, int& ngid, int& n_real_gid, int& nnode, int& ndiam
int nrnthread_dat2_2(int tid, int*& v_parent_index, double*& a, double*& b,
double*& area, double*& v, double*& diamvec);
int nrnthread_dat2_mech(int tid, size_t i, int dsz_inst, int*& nodeindices,
double*& data, int*& pdata);
double*& data, int*& pdata, std::vector<int>& pointer2type);
int nrnthread_dat2_3(int tid, int nweight, int*& output_vindex, double*& output_threshold,
int*& netcon_pnttype, int*& netcon_pntindex, double*& weights, double*& delays);
int nrnthread_dat2_corepointer(int tid, int& n);
Expand All @@ -55,7 +55,7 @@ int nrnthread_dat2_vecplay_inst(int tid, int i, int& vptype, int& mtype,
int& ix, int& sz, double*& yvec, double*& tvec,
int& last_index, int& discon_index, int& ubound_index);

int* datum2int(int type, Memb_list* ml, NrnThread& nt, CellGroup& cg, DatumIndices& di, int ml_vdata_offset);
int* datum2int(int type, Memb_list* ml, NrnThread& nt, CellGroup& cg, DatumIndices& di, int ml_vdata_offset, std::vector<int>& pointer2type);
}

extern "C" {
Expand Down
3 changes: 2 additions & 1 deletion src/nrniv/nrncore_write/data/cell_group.cpp
Original file line number Diff line number Diff line change
@@ -1,4 +1,5 @@
#include "cell_group.h"
#include "nrncore_write/utils/nrncore_utils.h"
#include "nrnran123.h" // globalindex written to globals.dat
#include "section.h"
#include "parse.hpp"
Expand Down Expand Up @@ -161,7 +162,7 @@ CellGroup* CellGroup::mk_cellgroups(CellGroup* cgs) {
}

void CellGroup::datumtransform(CellGroup* cgs) {
// ions, area, and POINTER to v.
// ions, area, and POINTER to v or mechanism data.
for (int ith=0; ith < nrn_nthread; ++ith) {
NrnThread& nt = nrn_threads[ith];
CellGroup& cg = cgs[ith];
Expand Down
2 changes: 0 additions & 2 deletions src/nrniv/nrncore_write/data/cell_group.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,6 @@ class PreSyn;
class NetCon;
class NrnThread;

extern "C" int nrn_dblpntr2nrncore(double*, NrnThread&, int& type, int& etype);

typedef std::pair < int, Memb_list* > MlWithArtItem;
typedef std::vector < MlWithArtItem > MlWithArt;
typedef std::map<double*, int> PVoid2Int;
Expand Down
4 changes: 2 additions & 2 deletions src/nrniv/nrncore_write/data/datum_indices.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,8 @@ class DatumIndices {
virtual ~DatumIndices();
int type;
// ordering as though pdata[i][j] was pdata[0][i*sz+j]
int* ion_type; // -1 -2 -3 -4 -5 means area,iontype,cvodeieq,netsend,pointer
int* ion_index; // or index into _actual_area
int* ion_type; // negative codes semantics, positive codes mechanism type
int* ion_index; // index of range variable relative to beginning of that type
};

#endif //NRN_DATUM_INDICES_H
10 changes: 8 additions & 2 deletions src/nrniv/nrncore_write/io/nrncore_io.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@ extern NetCvode* net_cvode_instance;
extern void (*nrnthread_v_transfer_)(NrnThread*);

int chkpnt;
const char *bbcore_write_version = "1.4"; // Generalize *_gap.dat to allow transfer of any range variable
const char *bbcore_write_version = "1.5"; // Generalize POINTER to allow pointing to any RANGE variable

/// create directory with given path
void create_dir_path(const std::string& path) {
Expand Down Expand Up @@ -183,7 +183,8 @@ void write_nrnthread(const char* path, NrnThread& nt, CellGroup& cg) {
for (size_t i = 0; i < mla.size(); ++i) {
int type = mla[i].first;
int *nodeindices=NULL, *pdata=NULL; double* data=NULL;
nrnthread_dat2_mech(nt.id, i, dsz_inst, nodeindices, data, pdata);
std::vector<int> pointer2type;
nrnthread_dat2_mech(nt.id, i, dsz_inst, nodeindices, data, pdata, pointer2type);
Memb_list* ml = mla[i].second;
int n = ml->nodecount;
int sz = nrn_prop_param_size_[type];
Expand All @@ -199,6 +200,11 @@ void write_nrnthread(const char* path, NrnThread& nt, CellGroup& cg) {
++dsz_inst;
writeint(pdata, n * sz);
delete [] pdata;
sz = pointer2type.size();
fprintf(f, "%d npointer\n", int(sz));
if (sz > 0) {
writeint(pointer2type.data(), sz);
}
}
}

Expand Down
9 changes: 8 additions & 1 deletion test/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -229,7 +229,7 @@ if(NRN_ENABLE_PYTHON AND PYTEST_FOUND)
NAME coreneuron_modtests
# This get used in 4 tests so make it the default and override in other tests.
SCRIPT_PATTERNS test/coreneuron/test_spikes.py
MODFILE_PATTERNS test/coreneuron/mod/*.mod test/pynrn/unitstest.mod test/gjtests/natrans.mod)
MODFILE_PATTERNS test/coreneuron/mod/*.mod test/coreneuron/mod/axial.inc test/pynrn/unitstest.mod test/gjtests/natrans.mod)
# In GPU builds run all of the tests on both CPU and GPU
set(coreneuron_modtests_gpu_env CORENRN_ENABLE_GPU=true)
foreach(processor cpu gpu)
Expand Down Expand Up @@ -294,6 +294,13 @@ if(NRN_ENABLE_PYTHON AND PYTEST_FOUND)
SCRIPT_PATTERNS test/coreneuron/test_netmove.py
COMMAND ${processor_env} COVERAGE_FILE=.coverage.coreneuron_test_netmove_py
${modtests_launch_py} test/coreneuron/test_netmove.py)
nrn_add_test(
GROUP coreneuron_modtests
NAME test_pointer_py_${processor}
REQUIRES coreneuron ${processor}
SCRIPT_PATTERNS test/coreneuron/test_pointer.py
COMMAND ${processor_env} COVERAGE_FILE=.coverage.coreneuron_test_pointer_py
${modtests_launch_py} test/coreneuron/test_pointer.py)
nrn_add_test(
GROUP coreneuron_modtests
NAME test_watchrange_py_${processor}
Expand Down
52 changes: 52 additions & 0 deletions test/coreneuron/mod/axial.inc
Original file line number Diff line number Diff line change
@@ -0,0 +1,52 @@
: Axial current and derivative with respect to x
: INCLUDE in density and point process

NEURON {
THREADSAFE
RANGE ri, ia, im
POINTER pv, pia, pim
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@nrnhines : to clarify - now not all POINTERs are invalid in the context of CoreNEURON. Only POINTERS that are used for explicit memory allocation needs to be handled with bbcore_read and bbcore_write. Right? We can add this clarification in #1678.

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@pramodk That is correct. That has always been correct for POINTER to voltage.

}

UNITS {
(mv) = (millivolt)
(nA) = (nanoamp)
(MOhm) = (megohm)
}

PARAMETER {
ri (MOhm) : center of compartment to center of parent compartment
}

ASSIGNED {
v (mV)
ia (nA)
im (nA) : im - i_membrane_ = electode_currents
pv (mV) : parent v
pia (nA) : parent ia
pim (nA) : parent im
}

AFTER INITIAL {
im = 0 : pia not ready yet
if (ri > 0) {
ia = (pv - v) / ri
}
}

AFTER SOLVE {
if (ri > 0) {
ia = (pv - v) / ri
im = ia : contribution from parent side
}
}

COMMENT
Need to explictly duplicate in axial.mod and axial_pp.mod since
a test of coreneuron checkpoint requires calculating iaSum and
nmodl does not currently allow multiple BEFORE STEP in same mod file
BEFORE STEP {
if (ri > 0) {
pim = pim - ia : child contributions
}
}
ENDCOMMENT
14 changes: 14 additions & 0 deletions test/coreneuron/mod/axial.mod
Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
NEURON {
SUFFIX axial
}

INCLUDE "axial.inc"

: get rid of following when nmodl allows multiple BEFORE STEP in same
:mod file
BEFORE STEP {
if (ri > 0) {
pim = pim - ia : child contributions
}
}

36 changes: 36 additions & 0 deletions test/coreneuron/mod/axial_pp.mod
Original file line number Diff line number Diff line change
@@ -0,0 +1,36 @@
NEURON {
POINT_PROCESS AxialPP
RANGE iaSum
}

INCLUDE "axial.inc"


: Just for testing coreneuron file mode checkpoint by integrating
: abs(ia) and using that to generate spikes (which are automatically
: output).

ASSIGNED {
iaSum (nA)
}

INITIAL {
iaSum = 0
net_send(0, 1)
}

BEFORE STEP {
if (ri > 0) {
pim = pim - ia : child contributions
iaSum = iaSum + fabs(ia)
}
}

NET_RECEIVE(w) {
if (flag == 1) {
WATCH (iaSum > .5) 2
} else if (flag == 2) {
iaSum = 0
net_event(t)
}
}
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