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CUDA Resize-18 implementation #19595

Merged
merged 14 commits into from
Feb 29, 2024
Merged

CUDA Resize-18 implementation #19595

merged 14 commits into from
Feb 29, 2024

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yuslepukhin
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Description

Implement Resize-18 on CUDA.

Motivation and Context

Performance

Add opset 18 features to CUDA, exceppt antialiasing
Setting up Antialias filters
Dispatch
SetupTriliner
Move buffer allocation and move antialias to separate file
Compiles and runs tests
CPU Testing compiles
Invoking SetupFilter
Adjust inferred dimensions
FP works, needs to redo for int
Fix int32 case
Fixes
Bounds fix
Finish upscaling setup tests
Make Upsample parallel
Implement Level1 and Level2 interpolation
Implement interpolation and extrapolation kernels
Refactor for local allocations
Working on Bilinear Upsample
Bilinear works
Fix Dtype
BiCubic works
Move Trilinear to function
Trilinear  2 steps work
Level22 results mismatch.
Works 3-D
Fix align corners
Make BiLinear function
Make BiCubic a function
CUDA Works
@yuslepukhin yuslepukhin force-pushed the yuslepukhin/resize_cuda_18 branch from 9f766d2 to 976f6a9 Compare February 23, 2024 22:53
@yuslepukhin yuslepukhin marked this pull request as ready for review February 24, 2024 00:13
@yuslepukhin yuslepukhin merged commit 5ee62a6 into main Feb 29, 2024
88 of 91 checks passed
@yuslepukhin yuslepukhin deleted the yuslepukhin/resize_cuda_18 branch February 29, 2024 22:46
zz002 pushed a commit to zz002/onnxruntime that referenced this pull request Mar 7, 2024
### Description
Implement Resize-18 on CUDA.

### Motivation and Context
Performance
@gedoensmax
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gedoensmax commented May 30, 2024

@yuslepukhin or @tianleiwu can you elaborate on the check used here:

if (!is_3D) {
if (!(scales[0] == 1.0f && scales[1] == 1.0f)) {
return ORT_MAKE_STATUS(ONNXRUNTIME, NOT_IMPLEMENTED, "Resize", ": NDHWC is not supported yet");
}
}

I am not clear on why this is a safe check for NDHWC vs NCDHW as the scales for D and C are often both == 1.0f as suggested by some unit tests:
std::vector<float> scales{1.0f, 1.0f, 2.0f, 2.0f, 1.0f};

I am looking at this to support the operators fully with channel last.

@gedoensmax
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I also noticed that I believe the resize kernel is not sufficiently tested for NCHW + int8/uint8 cases in CUDA EP:

float y_offset_1 = 1.0f - y_offset_0;
float x_offset_1 = 1.0f - x_offset_0;
output_data[id] =
x00 * static_cast<T>(y_offset_1 * x_offset_1) +
x01 * static_cast<T>(y_offset_0 * x_offset_1) +
x10 * static_cast<T>(y_offset_1 * x_offset_0) +
x11 * static_cast<T>(y_offset_0 * x_offset_0);

Judging by this line the result for int kernels will alway be 0. I verified this by adding the following unites which is the same as: NhwcResizeOpLinearDownSampleTest_4DBilinear_uint8 Please let me know if this sounds sensible then I will go ahead a file an issue for this case.

TEST(ResizeOpTest, ResizeOpLinearDownSampleTest_4DBilinear_uint8) {
  OpTester test("Resize", 13);
  std::vector<float> roi{};
  std::vector<float> scales{1.0f, 1.0f, 0.6f, 0.6f};

  test.AddAttribute("mode", "linear");

  constexpr int64_t N = 1, H = 2, W = 4, C = 1;
  std::vector<uint8_t> X = {
      1, 2, 3, 4,
      5, 6, 7, 8};

  test.AddInput<uint8_t>("X", {N, C, H, W}, X);
  test.AddInput<float>("roi", {0}, roi);
  test.AddInput<float>("scales", {4}, scales);

  std::vector<uint8_t> Y = {2, 4};

  test.AddOutput<uint8_t>("Y", {N, C, static_cast<int64_t>(H * scales[2]), static_cast<int64_t>(W * scales[3])}, Y);
  // ROCm: results mismatch
  test.Run(OpTester::ExpectResult::kExpectSuccess, "",
           {kRocmExecutionProvider});
}

@yuslepukhin
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yuslepukhin commented May 30, 2024

Go ahead and file an issue, and we will look into it. If you have a suggested change, do not hesitate to propose.

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4 participants