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Spellcheck Fixes
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Description

Fixes misspellings found in CI.

- [ ] Impacts functionality?
  - **Functionality** - Does the change ultimately impact how firmware functions?
  - Examples: Add a new library, publish a new PPI, update an algorithm, ...
- [ ] Impacts security?
  - **Security** - Does the change have a direct security impact on an application,
    flow, or firmware?
  - Examples: Crypto algorithm change, buffer overflow fix, parameter
    validation improvement, ...
- [ ] Breaking change?
  - **Breaking change** - Will anyone consuming this change experience a break
    in build or boot behavior?
  - Examples: Add a new library class, move a module to a different repo, call
    a function in a new library class in a pre-existing module, ...
- [ ] Includes tests?
  - **Tests** - Does the change include any explicit test code?
  - Examples: Unit tests, integration tests, robot tests, ...
- [ ] Includes documentation?
  - **Documentation** - Does the change contain explicit documentation additions
    outside direct code modifications (and comments)?
  - Examples: Update readme file, add feature readme file, link to documentation
    on an a separate Web page, ...

How This Was Tested

N/A

Integration Instructions

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TaylorBeebe committed Oct 6, 2023
1 parent 7b3ffc9 commit c528cb5
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Showing 5 changed files with 20 additions and 20 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -242,7 +242,7 @@ DumpProcessorSpecificHandlers (
}

/**
Dumps platorm info required to correctly parse the pages (architecture,
Dumps platform info required to correctly parse the pages (architecture,
execution level, etc.)
**/
VOID
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Original file line number Diff line number Diff line change
Expand Up @@ -191,7 +191,7 @@ FlushAndClearMemoryInfoDatabase (
);

/**
Dumps platorm info required to correctly parse the pages (architecture,
Dumps platform info required to correctly parse the pages (architecture,
execution level, etc.)
**/
VOID
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Original file line number Diff line number Diff line change
Expand Up @@ -738,7 +738,7 @@ DumpProcessorSpecificHandlers (
}

/**
Dumps platorm info required to correctly parse the pages (architecture,
Dumps platform info required to correctly parse the pages (architecture,
execution level, etc.)
**/
VOID
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30 changes: 15 additions & 15 deletions UefiTestingPkg/AuditTests/PagingAudit/Windows/BinaryParsing.py
Original file line number Diff line number Diff line change
Expand Up @@ -87,14 +87,14 @@ def Parse4kPages(fileName):
AccessFlag = ((ByteArray[byteZeroIndex + 1] & 0x4) >> 2)
IsTable = ((ByteArray[byteZeroIndex + 0] & 0x2) >> 1)
AccessPermisions = (((ByteArray[byteZeroIndex + 0] & 0xC0) >> 6))
Sharability = ((ByteArray[byteZeroIndex + 1] & 0x3))
Pxn = ((ByteArray[byteZeroIndex + 6] & 0x20) >> 5)
Uxn = ((ByteArray[byteZeroIndex + 6] & 0x40) >> 6)
Shareability = ((ByteArray[byteZeroIndex + 1] & 0x3))
Pxn = ((ByteArray[byteZeroIndex + 6] & 0x20) >> 5)
Uxn = ((ByteArray[byteZeroIndex + 6] & 0x40) >> 6)
PageTableBaseAddress = (int.from_bytes(ByteArray[byteZeroIndex: byteZeroIndex + 8], 'little')) & (0xFFFFFFFFF << 12)
logging.debug("4KB Page: 0x%s. Access Flag: %d. AccessPermissions: %d. Sharability: %d. Pxn: %d. Uxn: %d. PageTableBaseAddress: %s" % (BytesToHexString(ByteArray[byteZeroIndex : byteZeroIndex + 8]), AccessFlag, AccessPermisions, Sharability, Pxn, Uxn, hex(PageTableBaseAddress)))
logging.debug("4KB Page: 0x%s. Access Flag: %d. AccessPermissions: %d. Shareability: %d. Pxn: %d. Uxn: %d. PageTableBaseAddress: %s" % (BytesToHexString(ByteArray[byteZeroIndex : byteZeroIndex + 8]), AccessFlag, AccessPermisions, Shareability, Pxn, Uxn, hex(PageTableBaseAddress)))
byteZeroIndex += 8
num += 1
pages.append(MemoryRange("TTEntry", "4k", AccessFlag, (AccessPermisions & 0x2) >> 1, Sharability, Pxn, Uxn, PageTableBaseAddress, IsTable))
pages.append(MemoryRange("TTEntry", "4k", AccessFlag, (AccessPermisions & 0x2) >> 1, Shareability, Pxn, Uxn, PageTableBaseAddress, IsTable))

logging.debug("%d entries found in file %s" % (num, fileName))
return pages
Expand Down Expand Up @@ -131,14 +131,14 @@ def Parse2mPages(fileName):
AccessFlag = ((ByteArray[byteZeroIndex + 1] & 0x4) >> 2)
IsTable = ((ByteArray[byteZeroIndex + 0] & 0x2) >> 1)
AccessPermisions = (((ByteArray[byteZeroIndex + 0] & 0xC0) >> 6))
Sharability = ((ByteArray[byteZeroIndex + 1] & 0x3))
Pxn = ((ByteArray[byteZeroIndex + 6] & 0x20) >> 5)
Uxn = ((ByteArray[byteZeroIndex + 6] & 0x40) >> 6)
Shareability = ((ByteArray[byteZeroIndex + 1] & 0x3))
Pxn = ((ByteArray[byteZeroIndex + 6] & 0x20) >> 5)
Uxn = ((ByteArray[byteZeroIndex + 6] & 0x40) >> 6)
PageTableBaseAddress = (int.from_bytes(ByteArray[byteZeroIndex: byteZeroIndex + 8], 'little')) & (0xFFFFFFFFF << 12)
logging.debug("2MB Page: 0x%s. Access Flag: %d. IsTable: %d AccessPermissions: %d. Sharability: %d. Pxn: %d. Uxn: %d. PageTableBaseAddress: %s" % (BytesToHexString(ByteArray[byteZeroIndex : byteZeroIndex + 8]), AccessFlag, IsTable, AccessPermisions, Sharability, Pxn, Uxn, hex(PageTableBaseAddress)))
logging.debug("2MB Page: 0x%s. Access Flag: %d. IsTable: %d AccessPermissions: %d. Shareability: %d. Pxn: %d. Uxn: %d. PageTableBaseAddress: %s" % (BytesToHexString(ByteArray[byteZeroIndex : byteZeroIndex + 8]), AccessFlag, IsTable, AccessPermisions, Shareability, Pxn, Uxn, hex(PageTableBaseAddress)))
byteZeroIndex += 8
num += 1
pages.append(MemoryRange("TTEntry", "2m", AccessFlag, (AccessPermisions & 0x2) >> 1, Sharability, Pxn, Uxn, PageTableBaseAddress, IsTable))
pages.append(MemoryRange("TTEntry", "2m", AccessFlag, (AccessPermisions & 0x2) >> 1, Shareability, Pxn, Uxn, PageTableBaseAddress, IsTable))

logging.debug("%d entries found in file %s" % (num, fileName))
return pages
Expand Down Expand Up @@ -175,14 +175,14 @@ def Parse1gPages(fileName):
AccessFlag = ((ByteArray[byteZeroIndex + 1] & 0x4) >> 2)
IsTable = ((ByteArray[byteZeroIndex + 0] & 0x2) >> 1)
AccessPermisions = (((ByteArray[byteZeroIndex + 0] & 0xC0) >> 6))
Sharability = ((ByteArray[byteZeroIndex + 1] & 0x3))
Pxn = ((ByteArray[byteZeroIndex + 6] & 0x20) >> 5)
Uxn = ((ByteArray[byteZeroIndex + 6] & 0x40) >> 6)
Shareability = ((ByteArray[byteZeroIndex + 1] & 0x3))
Pxn = ((ByteArray[byteZeroIndex + 6] & 0x20) >> 5)
Uxn = ((ByteArray[byteZeroIndex + 6] & 0x40) >> 6)
PageTableBaseAddress = (int.from_bytes(ByteArray[byteZeroIndex: byteZeroIndex + 8], 'little')) & (0xFFFFFFFFF << 12)
logging.debug("1GB Page: 0x%s. Access Flag: %d. IsTable: %d AccessPermissions: %d. Sharability: %d. Pxn: %d. Uxn: %d. PageTableBaseAddress: %s" % (BytesToHexString(ByteArray[byteZeroIndex : byteZeroIndex + 8]), AccessFlag, IsTable, AccessPermisions, Sharability, Pxn, Uxn, hex(PageTableBaseAddress)))
logging.debug("1GB Page: 0x%s. Access Flag: %d. IsTable: %d AccessPermissions: %d. Shareability: %d. Pxn: %d. Uxn: %d. PageTableBaseAddress: %s" % (BytesToHexString(ByteArray[byteZeroIndex : byteZeroIndex + 8]), AccessFlag, IsTable, AccessPermisions, Shareability, Pxn, Uxn, hex(PageTableBaseAddress)))
byteZeroIndex += 8
num += 1
pages.append(MemoryRange("TTEntry", "1g", AccessFlag, (AccessPermisions & 0x2) >> 1, Sharability, Pxn, Uxn, PageTableBaseAddress, IsTable))
pages.append(MemoryRange("TTEntry", "1g", AccessFlag, (AccessPermisions & 0x2) >> 1, Shareability, Pxn, Uxn, PageTableBaseAddress, IsTable))

logging.debug("%d entries found in file %s" % (num, fileName))
return pages
Original file line number Diff line number Diff line change
Expand Up @@ -252,11 +252,11 @@ def GuardPageInit(self, VA):
self.Nx = 0
self.Present = 0

def TteInit(self, PageSize, AccessFlag, ReadWrite, Sharability, Pxn, Uxn, VA, IsTable):
def TteInit(self, PageSize, AccessFlag, ReadWrite, Shareability, Pxn, Uxn, VA, IsTable):
self.PageSize = PageSize
self.AccessFlag = AccessFlag
self.ReadWrite = 0 if (ReadWrite == 1) else 1
self.Sharability = Sharability
self.Shareability = Shareability
self.Px = 0 if (Pxn == 1) else 1
self.Ux = 0 if (Uxn == 1) else 1
self.PhysicalStart = VA
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