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v0.5.0

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@khwong-c khwong-c released this 20 Feb 20:32
· 18 commits to main since this release
v0.5.0
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GPG key ID: B5690EEEBB952194
Learn about vigilant mode.

New Features

  • Rework on Signal Bundles in #25
  • Standard Bundles in #26
  • Verilog Wrapper Generator in #28

Bug Fix

  • Fix: Multiply width Inference in #24

Project related

  • Defining project structure in #30

Full Changelog: v0.4.1...v0.5.0

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