Add formatting changes from allow list

Signed-off-by: Rafal Kapuscik <[email protected]>
lowRISC · Apr 15, 2021 · 624ff14 · 624ff14
1 parent 69b1c42
commit 624ff14
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Showing 28 changed files with 162 additions and 109 deletions.
diff --git a/hw/dv/sv/alert_esc_agent/alert_esc_base_monitor.sv b/hw/dv/sv/alert_esc_agent/alert_esc_base_monitor.sv
@@ -7,11 +7,11 @@
 // Alert sender receiver interface base monitor
 // ---------------------------------------------
 
-class alert_esc_base_monitor extends dv_base_monitor#(
-    .ITEM_T (alert_esc_seq_item),
-    .CFG_T  (alert_esc_agent_cfg),
-    .COV_T  (alert_esc_agent_cov)
-  );
+class alert_esc_base_monitor extends dv_base_monitor #(
+  .ITEM_T(alert_esc_seq_item),
+  .CFG_T (alert_esc_agent_cfg),
+  .COV_T (alert_esc_agent_cov)
+);
 
   `uvm_component_utils(alert_esc_base_monitor)
   uvm_analysis_port #(alert_esc_seq_item) alert_esc_port;

diff --git a/hw/dv/sv/alert_esc_agent/alert_esc_probe_if.sv b/hw/dv/sv/alert_esc_agent/alert_esc_probe_if.sv
@@ -8,7 +8,10 @@
 // state the expected resp_p should be high or not. However, from the esc_receiver interface, we
 // can only see "esc_p/n", which follows "esc_en_i" with one clock cycle delay.
 // Thus we need to probe this signal to accurately predict the signal integrity fail count.
-interface alert_esc_probe_if(input clk, input rst_n);
+interface alert_esc_probe_if (
+  input clk,
+  input rst_n
+);
 
   wire esc_en;
 

diff --git a/hw/dv/sv/dv_utils/dv_test_status_pkg.sv b/hw/dv/sv/dv_utils/dv_test_status_pkg.sv
@@ -18,8 +18,7 @@ package dv_test_status_pkg;
       $display("  | |  __/\\__ \\ |_  | |_) | (_| \\__ \\__ \\  __/ (_| |_|");
       $display("  |_|\\___||___/\\__| | .__/ \\__,_|___/___/\\___|\\__,_(_)");
       $display("                    |_|                               \n");
-    end
-    else begin
+    end else begin
       $display("\nTEST FAILED CHECKS");
       $display(" _____         _      __       _ _          _ _ ");
       $display("|_   _|__  ___| |_   / _| __ _(_) | ___  __| | |");

diff --git a/hw/ip/adc_ctrl/dv/env/adc_ctrl_env_cfg.sv b/hw/ip/adc_ctrl/dv/env/adc_ctrl_env_cfg.sv
@@ -2,7 +2,9 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-class adc_ctrl_env_cfg extends cip_base_env_cfg #(.RAL_T(adc_ctrl_reg_block));
+class adc_ctrl_env_cfg extends cip_base_env_cfg #(
+  .RAL_T(adc_ctrl_reg_block)
+);
 
   virtual clk_rst_if clk_aon_rst_vif;
 

diff --git a/hw/ip/adc_ctrl/dv/env/adc_ctrl_env_cov.sv b/hw/ip/adc_ctrl/dv/env/adc_ctrl_env_cov.sv
@@ -8,7 +8,9 @@
  * Covergroups may also be wrapped inside helper classes if needed.
  */
 
-class adc_ctrl_env_cov extends cip_base_env_cov #(.CFG_T(adc_ctrl_env_cfg));
+class adc_ctrl_env_cov extends cip_base_env_cov #(
+  .CFG_T(adc_ctrl_env_cfg)
+);
   `uvm_component_utils(adc_ctrl_env_cov)
 
   // the base class provides the following handles for use:

diff --git a/hw/ip/adc_ctrl/dv/env/adc_ctrl_virtual_sequencer.sv b/hw/ip/adc_ctrl/dv/env/adc_ctrl_virtual_sequencer.sv
@@ -3,9 +3,9 @@
 // SPDX-License-Identifier: Apache-2.0
 
 class adc_ctrl_virtual_sequencer extends cip_base_virtual_sequencer #(
-    .CFG_T(adc_ctrl_env_cfg),
-    .COV_T(adc_ctrl_env_cov)
-  );
+  .CFG_T(adc_ctrl_env_cfg),
+  .COV_T(adc_ctrl_env_cov)
+);
   `uvm_component_utils(adc_ctrl_virtual_sequencer)
 
 

diff --git a/hw/ip/adc_ctrl/dv/env/seq_lib/adc_ctrl_base_vseq.sv b/hw/ip/adc_ctrl/dv/env/seq_lib/adc_ctrl_base_vseq.sv
@@ -3,11 +3,11 @@
 // SPDX-License-Identifier: Apache-2.0
 
 class adc_ctrl_base_vseq extends cip_base_vseq #(
-    .RAL_T               (adc_ctrl_reg_block),
-    .CFG_T               (adc_ctrl_env_cfg),
-    .COV_T               (adc_ctrl_env_cov),
-    .VIRTUAL_SEQUENCER_T (adc_ctrl_virtual_sequencer)
-  );
+  .RAL_T              (adc_ctrl_reg_block),
+  .CFG_T              (adc_ctrl_env_cfg),
+  .COV_T              (adc_ctrl_env_cov),
+  .VIRTUAL_SEQUENCER_T(adc_ctrl_virtual_sequencer)
+);
   `uvm_object_utils(adc_ctrl_base_vseq)
 
   // various knobs to enable certain routines
@@ -28,13 +28,13 @@ class adc_ctrl_base_vseq extends cip_base_vseq #(
   // setup basic adc_ctrl features
   virtual task adc_ctrl_init();
     `uvm_info(`gfn, "Initializating adc_ctrl, nothing to do at the moment", UVM_MEDIUM)
-  endtask // adc_ctrl_init
+  endtask  // adc_ctrl_init
 
   virtual task apply_reset(string kind = "HARD");
     if (kind == "HARD") begin
       cfg.clk_aon_rst_vif.apply_reset();
     end
     super.apply_reset(kind);
-  endtask // apply_reset
+  endtask  // apply_reset
 
 endclass : adc_ctrl_base_vseq
diff --git a/hw/ip/adc_ctrl/dv/tb.sv b/hw/ip/adc_ctrl/dv/tb.sv
@@ -18,25 +18,34 @@ module tb;
   wire [NUM_MAX_INTERRUPTS-1:0] interrupts;
 
   // interfaces
-  clk_rst_if clk_rst_if(.clk(clk), .rst_n(rst_n));
-  clk_rst_if clk_aon_rst_if(.clk(clk_aon), .rst_n(rst_aon_n));
-  pins_if #(NUM_MAX_INTERRUPTS) intr_if(interrupts);
-  pins_if #(1) devmode_if(devmode);
-  tl_if tl_if(.clk(clk), .rst_n(rst_n));
+  clk_rst_if clk_rst_if (
+    .clk  (clk),
+    .rst_n(rst_n)
+  );
+  clk_rst_if clk_aon_rst_if (
+    .clk  (clk_aon),
+    .rst_n(rst_aon_n)
+  );
+  pins_if #(NUM_MAX_INTERRUPTS) intr_if (interrupts);
+  pins_if #(1) devmode_if (devmode);
+  tl_if tl_if (
+    .clk  (clk),
+    .rst_n(rst_n)
+  );
 
 
   // dut
   adc_ctrl dut (
-    .clk_i                (clk      ),
-    .rst_ni               (rst_n    ),
-    .clk_aon_i            (clk_aon  ),
-    .rst_slow_ni          (rst_aon_n),
-    .tl_i                 (tl_if.h2d),
-    .tl_o                 (tl_if.d2h),
-    .adc_o                (),
-    .adc_i                ('0),
-    .intr_debug_cable_o   (interrupts[0]),
-    .debug_cable_wakeup_o ()
+    .clk_i               (clk),
+    .rst_ni              (rst_n),
+    .clk_aon_i           (clk_aon),
+    .rst_slow_ni         (rst_aon_n),
+    .tl_i                (tl_if.h2d),
+    .tl_o                (tl_if.d2h),
+    .adc_o               (),
+    .adc_i               ('0),
+    .intr_debug_cable_o  (interrupts[0]),
+    .debug_cable_wakeup_o()
   );
 
   initial begin

diff --git a/hw/ip/adc_ctrl/dv/tests/adc_ctrl_base_test.sv b/hw/ip/adc_ctrl/dv/tests/adc_ctrl_base_test.sv
@@ -3,9 +3,9 @@
 // SPDX-License-Identifier: Apache-2.0
 
 class adc_ctrl_base_test extends cip_base_test #(
-    .CFG_T(adc_ctrl_env_cfg),
-    .ENV_T(adc_ctrl_env)
-  );
+  .CFG_T(adc_ctrl_env_cfg),
+  .ENV_T(adc_ctrl_env)
+);
 
   `uvm_component_utils(adc_ctrl_base_test)
   `uvm_component_new

diff --git a/hw/ip/adc_ctrl/rtl/adc_ctrl.sv b/hw/ip/adc_ctrl/rtl/adc_ctrl.sv
@@ -7,10 +7,10 @@
 `include "prim_assert.sv"
 
 module adc_ctrl (
-  input clk_i,//regular core clock for SW config interface
-  input clk_aon_i,//always-on slow clock for internal logic
-  input rst_ni,//power-on hardware reset
-  input rst_slow_ni,//power-on reset for the 200KHz clock(logic)
+  input clk_i,  //regular core clock for SW config interface
+  input clk_aon_i,  //always-on slow clock for internal logic
+  input rst_ni,  //power-on hardware reset
+  input rst_slow_ni,  //power-on reset for the 200KHz clock(logic)
 
   //Regster interface
   input  tlul_pkg::tl_h2d_t tl_i,
@@ -39,7 +39,7 @@ module adc_ctrl (
   //input  [2:0] pwr_sts,//3’b001: deep sleep, 3’b010: normal sleep, 3’b100: fully active
 );
 
-  import adc_ctrl_reg_pkg::* ;
+  import adc_ctrl_reg_pkg::*;
 
   adc_ctrl_reg2hw_t reg2hw;
   adc_ctrl_hw2reg_t hw2reg;
@@ -55,7 +55,7 @@ module adc_ctrl (
     .reg2hw(reg2hw),
     .hw2reg(hw2reg),
     .intg_err_o(),
-    .devmode_i  (1'b1)
+    .devmode_i(1'b1)
   );
 
   // Instantiate DCD core module

diff --git a/hw/ip/gpio/dv/env/gpio_env.sv b/hw/ip/gpio/dv/env/gpio_env.sv
@@ -3,11 +3,11 @@
 // SPDX-License-Identifier: Apache-2.0
 
 class gpio_env extends cip_base_env #(
-        .CFG_T               (gpio_env_cfg),
-        .COV_T               (gpio_env_cov),
-        .VIRTUAL_SEQUENCER_T (gpio_virtual_sequencer),
-        .SCOREBOARD_T        (gpio_scoreboard)
-    );
+  .CFG_T              (gpio_env_cfg),
+  .COV_T              (gpio_env_cov),
+  .VIRTUAL_SEQUENCER_T(gpio_virtual_sequencer),
+  .SCOREBOARD_T       (gpio_scoreboard)
+);
   `uvm_component_utils(gpio_env)
 
   `uvm_component_new

diff --git a/hw/ip/gpio/dv/env/gpio_env_cfg.sv b/hw/ip/gpio/dv/env/gpio_env_cfg.sv
@@ -2,7 +2,9 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-class gpio_env_cfg extends cip_base_env_cfg #(.RAL_T(gpio_reg_block));
+class gpio_env_cfg extends cip_base_env_cfg #(
+  .RAL_T(gpio_reg_block)
+);
 
   // flag to indicate if weak pullup has been introduced on gpio
   // By default, weak pull up is always present
@@ -12,9 +14,7 @@ class gpio_env_cfg extends cip_base_env_cfg #(.RAL_T(gpio_reg_block));
   // gpio virtual interface
   gpio_vif gpio_vif;
 
-  constraint pullup_pulldown_en_c {
-    pullup_en ^ pulldown_en;
-  }
+  constraint pullup_pulldown_en_c {pullup_en ^ pulldown_en;}
 
   `uvm_object_utils(gpio_env_cfg)
   `uvm_object_new

diff --git a/hw/ip/gpio/dv/env/seq_lib/gpio_intr_rand_pgm_vseq.sv b/hw/ip/gpio/dv/env/seq_lib/gpio_intr_rand_pgm_vseq.sv
@@ -85,7 +85,7 @@ class gpio_intr_rand_pgm_vseq extends gpio_base_vseq;
       end
       `uvm_info(msg_id, "End of Transaction", UVM_HIGH)
 
-    end // end for
+    end  // end for
 
   endtask : body
 

diff --git a/hw/ip/gpio/dv/tb/tb.sv b/hw/ip/gpio/dv/tb/tb.sv
@@ -25,25 +25,31 @@ module tb;
   wire [NUM_MAX_INTERRUPTS-1:0] interrupts;
 
   // interfaces
-  clk_rst_if clk_rst_if(.clk(clk), .rst_n(rst_n));
-  pins_if #(NUM_MAX_INTERRUPTS) intr_if(.pins(interrupts));
-  pins_if #(1) devmode_if(.pins(devmode));
-  tl_if tl_if(.clk(clk), .rst_n(rst_n));
-  pins_if #(NUM_GPIOS) gpio_if(.pins(gpio_pins));
+  clk_rst_if clk_rst_if (
+    .clk  (clk),
+    .rst_n(rst_n)
+  );
+  pins_if #(NUM_MAX_INTERRUPTS) intr_if (.pins(interrupts));
+  pins_if #(1) devmode_if (.pins(devmode));
+  tl_if tl_if (
+    .clk  (clk),
+    .rst_n(rst_n)
+  );
+  pins_if #(NUM_GPIOS) gpio_if (.pins(gpio_pins));
 
   // dut
   gpio dut (
-    .clk_i                (clk        ),
-    .rst_ni               (rst_n      ),
+    .clk_i (clk),
+    .rst_ni(rst_n),
 
-    .tl_i                 (tl_if.h2d  ),
-    .tl_o                 (tl_if.d2h  ),
+    .tl_i(tl_if.h2d),
+    .tl_o(tl_if.d2h),
 
-    .cio_gpio_i           (gpio_i     ),
-    .cio_gpio_o           (gpio_o     ),
-    .cio_gpio_en_o        (gpio_oe    ),
+    .cio_gpio_i   (gpio_i),
+    .cio_gpio_o   (gpio_o),
+    .cio_gpio_en_o(gpio_oe),
 
-    .intr_gpio_o          (gpio_intr  )
+    .intr_gpio_o(gpio_intr)
   );
 
   assign interrupts[NUM_GPIOS-1:0] = gpio_intr;

diff --git a/hw/ip/gpio/dv/tests/gpio_base_test.sv b/hw/ip/gpio/dv/tests/gpio_base_test.sv
@@ -2,7 +2,10 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-class gpio_base_test extends cip_base_test #(.ENV_T(gpio_env), .CFG_T(gpio_env_cfg));
+class gpio_base_test extends cip_base_test #(
+  .ENV_T(gpio_env),
+  .CFG_T(gpio_env_cfg)
+);
   `uvm_component_utils(gpio_base_test)
   `uvm_component_new
 

diff --git a/hw/ip/pinmux/rtl/pinmux_jtag_buf.sv b/hw/ip/pinmux/rtl/pinmux_jtag_buf.sv
@@ -14,23 +14,23 @@ module pinmux_jtag_buf (
     .clk_o(req_o.tck)
   );
   prim_buf prim_buf_trst_n (
-    .in_i(req_i.trst_n),
+    .in_i (req_i.trst_n),
     .out_o(req_o.trst_n)
   );
   prim_buf prim_buf_tms (
-    .in_i(req_i.tms),
+    .in_i (req_i.tms),
     .out_o(req_o.tms)
   );
   prim_buf prim_buf_tdi (
-    .in_i(req_i.tdi),
+    .in_i (req_i.tdi),
     .out_o(req_o.tdi)
   );
   prim_buf prim_buf_tdo (
-    .in_i(rsp_i.tdo),
+    .in_i (rsp_i.tdo),
     .out_o(rsp_o.tdo)
   );
   prim_buf prim_buf_tdo_oe (
-    .in_i(rsp_i.tdo_oe),
+    .in_i (rsp_i.tdo_oe),
     .out_o(rsp_o.tdo_oe)
   );
 

diff --git a/hw/ip/prim_xilinx/rtl/prim_xilinx_buf.sv b/hw/ip/prim_xilinx/rtl/prim_xilinx_buf.sv
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-module prim_xilinx_buf  #(
+module prim_xilinx_buf #(
   parameter int Width = 1
 ) (
   input [Width-1:0] in_i,

diff --git a/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_buf.sv b/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_buf.sv
@@ -8,8 +8,8 @@ module prim_xilinx_clock_buf (
 );
 
   BUFG bufg_i (
-    .I (clk_i),
-    .O (clk_o)
+    .I(clk_i),
+    .O(clk_o)
   );
 
 endmodule
diff --git a/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_gating.sv b/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_gating.sv
@@ -15,9 +15,9 @@ module prim_xilinx_clock_gating #(
     assign clk_o = clk_i;
   end else begin : gen_gate
     BUFGCE u_bufgce (
-      .I  (clk_i),
-      .CE (en_i | test_en_i),
-      .O  (clk_o)
+      .I (clk_i),
+      .CE(en_i | test_en_i),
+      .O (clk_o)
     );
   end
 

diff --git a/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_mux2.sv b/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_mux2.sv
@@ -20,11 +20,11 @@ module prim_xilinx_clock_mux2 #(
     // ug953-vivado-7series-libraries.pdf
     // ug974-vivado-ultrascale-libraries.pdf
     BUFGMUX bufgmux_i (
-      .S  ( sel_i  ),
-      .I0 ( clk0_i ),
-      .I1 ( clk1_i ),
-      .O  ( clk_o  )
-      );
+      .S (sel_i),
+      .I0(clk0_i),
+      .I1(clk1_i),
+      .O (clk_o)
+    );
   end
 
   // make sure sel is never X (including during reset)

diff --git a/hw/ip/pwm/dv/env/pwm_env_cov.sv b/hw/ip/pwm/dv/env/pwm_env_cov.sv
@@ -8,7 +8,9 @@
  * Covergroups may also be wrapped inside helper classes if needed.
  */
 
-class pwm_env_cov extends cip_base_env_cov #(.CFG_T(pwm_env_cfg));
+class pwm_env_cov extends cip_base_env_cov #(
+  .CFG_T(pwm_env_cfg)
+);
   `uvm_component_utils(pwm_env_cov)
 
   // the base class provides the following handles for use: