jtag/drivers: add Xilinx XVC TCP

Added new XVC TCP driver based on Xilinx's specs. Coding style is
heavily influenced by bitbang.c and jlink.c, credits to the corresponding authors.
This protocol is intended to be used for bitbanging remote JTAG devices while
using pre-defined messages, like 'shift'.

Change-Id: I59d61f9acca6b41bdf1e9d689ef3c4a026dded4c
Signed-off-by: Jose Borja Castillo <[email protected]>

configure.ac

@@ -116,6 +116,7 @@ m4_define([ADAPTER_OPT], [m4_translit(ADAPTER_ARG($1), [_], [-])])
 m4_define([USB1_ADAPTERS],
  [[[ftdi], [MPSSE mode of FTDI based devices], [FTDI]],
  [[stlink], [ST-Link Programmer], [HLADAPTER_STLINK]],
+ [[xvc], [Xilinx XVC TCP], [xvc]],
  [[ti_icdi], [TI ICDI JTAG Programmer], [HLADAPTER_ICDI]],
  [[ulink], [Keil ULINK JTAG Programmer], [ULINK]],
  [[angie], [ANGIE Adapter], [ANGIE]],
@@ -377,6 +378,10 @@ AC_ARG_ENABLE([remote-bitbang],
  AS_HELP_STRING([--enable-remote-bitbang], [Enable building support for the Remote Bitbang jtag driver]),
  [build_remote_bitbang=$enableval], [build_remote_bitbang=no])
 
+AC_ARG_ENABLE([xvc],
+ AS_HELP_STRING([--enable-xvc], [Enable building support for the Xilinx XVC TCP jtag driver]),
+ [build_xvc=$enableval], [build_xvc=yes])
+
 AS_CASE(["${host_cpu}"],
  [i?86|x86*], [],
  [
@@ -589,6 +594,13 @@ AS_IF([test "x$build_remote_bitbang" = "xyes"], [
  AC_DEFINE([BUILD_REMOTE_BITBANG], [0], [0 if you don't want the Remote Bitbang JTAG driver.])
 ])
 
+AS_IF([test "x$build_xvc" = "xyes"], [
+ build_bitbang=yes
+ AC_DEFINE([BUILD_XVC], [1], [1 if you want the Xilinx XVC TCP driver.])
+], [
+ AC_DEFINE([BUILD_XVC], [0], [0 if you don't want the Xilinx XVC TCP driver.])
+])
+
 AS_IF([test "x$build_sysfsgpio" = "xyes"], [
  build_bitbang=yes
  AC_DEFINE([BUILD_SYSFSGPIO], [1], [1 if you want the SysfsGPIO driver.])
@@ -755,6 +767,7 @@ AM_CONDITIONAL([USE_HIDAPI], [test "x$use_hidapi" = "xyes"])
 AM_CONDITIONAL([USE_LIBJAYLINK], [test "x$use_libjaylink" = "xyes"])
 AM_CONDITIONAL([RSHIM], [test "x$build_rshim" = "xyes"])
 AM_CONDITIONAL([HAVE_CAPSTONE], [test "x$enable_capstone" != "xno"])
+AM_CONDITIONAL([XVC], [test "x$build_xvc" = "xyes"])
 
 AM_CONDITIONAL([INTERNAL_JIMTCL], [test "x$use_internal_jimtcl" = "xyes"])
 AM_CONDITIONAL([INTERNAL_LIBJAYLINK], [test "x$use_internal_libjaylink" = "xyes"])

doc/openocd.texi

@@ -615,6 +615,9 @@ emulation model of target hardware.
 @item @b{xlnx_pcie_xvc}
 @* A JTAG driver exposing Xilinx Virtual Cable over PCI Express to OpenOCD as JTAG/SWD interface.
 
+@item @b{xvc}
+@* A JTAG driver using Xilinx Virtual Cable over TCP to OpenOCD as JTAG interface.
+
 @item @b{linuxgpiod}
 @* A bitbang JTAG driver using Linux GPIO through library libgpiod.
 
@@ -3568,6 +3571,28 @@ espusbjtag chip_id 1
 
 @end deffn
 
+@deffn {Interface Driver} {xvc}
+This driver implements bitbang mode of JTAG devices
+using Xilinx Virtual Cable messages over TCP/IP.
+This implementation is XVC protocol 1.0 only, does not support 1.1 extension.
+Example configuration:
+
+@example
+xvc_host 192.168.3.192
+xvc_port 5000
+@end example
+
+@deffn {Config Command} {xvc_host} @var{hostname}
+Specifies the hostname of the remote debugger to connect to. Albeit
+it is possible to use UNIX sockets, it is not recommended.
+@end deffn
+
+@deffn {Config Command} {xvc_port} @var{number}
+Specifies the port of the remote process to connect to.
+@end deffn
+
+@end deffn
+
 @section Transport Configuration
 @cindex Transport
 As noted earlier, depending on the version of OpenOCD you use,

src/jtag/drivers/Makefile.am

@@ -201,6 +201,9 @@ endif
 if AM335XGPIO
 DRIVERFILES += %D%/am335xgpio.c
 endif
+if XVC
+DRIVERFILES += %D%/xvc.c
+endif
 
 DRIVERHEADERS = \
  %D%/bitbang.h \