[FIRRTL] Replaced 'replicate' to correctly named 'replace' flags (#7442)

Renamed and replaced shouldReplicateSequentialMemories to shouldReplaceSequentialMemories per issue #7384
llvm · Aug 6, 2024 · 1a8f82e · 1a8f82e
1 parent 1645d71
commit 1a8f82e
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Showing 2 changed files with 5 additions and 5 deletions.
diff --git a/include/circt/Firtool/Firtool.h b/include/circt/Firtool/Firtool.h
@@ -96,7 +96,7 @@ class FirtoolOptions {
  return allowAddingPortsOnPublic;
  }
  bool shouldConvertProbesToSignals() const { return probesToSignals; }
- bool shouldReplicateSequentialMemories() const { return replSeqMem; }
+ bool shouldReplaceSequentialMemories() const { return replSeqMem; }
  bool shouldDisableOptimization() const { return disableOptimization; }
  bool shouldLowerMemories() const { return lowerMemories; }
  bool shouldDedup() const { return !noDedup; }

diff --git a/lib/Firtool/Firtool.cpp b/lib/Firtool/Firtool.cpp
@@ -78,7 +78,7 @@ LogicalResult firtool::populateCHIRRTLToLowFIRRTL(mlir::PassManager &pm,
  pm.nest<firrtl::CircuitOp>().addPass(firrtl::createInferWidthsPass());
 
  pm.nest<firrtl::CircuitOp>().addPass(
- firrtl::createMemToRegOfVecPass(opt.shouldReplicateSequentialMemories(),
+ firrtl::createMemToRegOfVecPass(opt.shouldReplaceSequentialMemories(),
  opt.shouldIgnoreReadEnableMemories()));
 
  pm.nest<firrtl::CircuitOp>().addPass(firrtl::createInferResetsPass());
@@ -161,7 +161,7 @@ LogicalResult firtool::populateCHIRRTLToLowFIRRTL(mlir::PassManager &pm,
  pm.nest<firrtl::CircuitOp>().nest<firrtl::FModuleOp>().addPass(
  firrtl::createInferReadWritePass());
 
- if (opt.shouldReplicateSequentialMemories())
+ if (opt.shouldReplaceSequentialMemories())
  pm.nest<firrtl::CircuitOp>().addPass(firrtl::createLowerMemoryPass());
 
  pm.nest<firrtl::CircuitOp>().addPass(firrtl::createPrefixModulesPass());
@@ -176,7 +176,7 @@ LogicalResult firtool::populateCHIRRTLToLowFIRRTL(mlir::PassManager &pm,
  pm.addNestedPass<firrtl::CircuitOp>(firrtl::createAddSeqMemPortsPass());
 
  pm.addPass(firrtl::createCreateSiFiveMetadataPass(
- opt.shouldReplicateSequentialMemories(),
+ opt.shouldReplaceSequentialMemories(),
  opt.getReplaceSequentialMemoriesFile()));
 
  pm.addNestedPass<firrtl::CircuitOp>(firrtl::createExtractInstancesPass());
@@ -303,7 +303,7 @@ LogicalResult firtool::populateHWToSV(mlir::PassManager &pm,
  FirtoolOptions::RandomKind::Mem),
  /*disableRegRandomization=*/
  !opt.isRandomEnabled(FirtoolOptions::RandomKind::Reg),
- /*replSeqMem=*/opt.shouldReplicateSequentialMemories(),
+ /*replSeqMem=*/opt.shouldReplaceSequentialMemories(),
  /*readEnableMode=*/opt.shouldIgnoreReadEnableMemories()
  ? seq::ReadEnableMode::Ignore
  : seq::ReadEnableMode::Undefined,