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Fix missing requirements to synthesize core #583
Fix missing requirements to synthesize core #583
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Then why does the "Synthesize full core" workflow not fail? Also, the only use of |
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It installed
Changed. Pyright python version was incorrectly set to |
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Why the checks are not running? Edit: It's working here: https://github.com/piotro888/coreblocks/actions/runs/7862647436/job/21452343481 |
We use
typing-extensions
in Transactron, and verilog core cannot be synthesized without it.