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Fix missing requirements to synthesize core #583

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piotro888
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We use typing-extensions in Transactron, and verilog core cannot be synthesized without it.

@piotro888 piotro888 force-pushed the piotro/requirements-typing-extension branch from acc5844 to af4e5ce Compare February 8, 2024 18:45
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tilk commented Feb 8, 2024

Then why does the "Synthesize full core" workflow not fail? Also, the only use of typing_extensions I see is for Self, which can be imported from typing in Python 3.11, the currently used version.

@piotro888 piotro888 force-pushed the piotro/requirements-typing-extension branch from af4e5ce to bf93a2d Compare February 11, 2024 14:18
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Then why does the "Synthesize full core" workflow not fail?

It installed requirements-dev.txt and it was probably dependency of some other package. I changed core systhesis to use requirements.txt, to verify that core can be build with non-dev version.

I see is for Self, which can be imported from typing in Python 3.11, the currently used version.

Changed. Pyright python version was incorrectly set to 3.10 and this was reported as error before

@piotro888 piotro888 changed the title Add missing typing-extensions to requirements Fix missing requirements to synthesize core Feb 11, 2024
@piotro888 piotro888 force-pushed the piotro/requirements-typing-extension branch from bf93a2d to 3efb61e Compare February 11, 2024 14:26
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piotro888 commented Feb 11, 2024

Why the checks are not running?

Edit: It's working here: https://github.com/piotro888/coreblocks/actions/runs/7862647436/job/21452343481

@tilk tilk merged commit 137e47f into kuznia-rdzeni:master Feb 12, 2024
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tilk pushed a commit to kuznia-rdzeni/transactron that referenced this pull request Nov 25, 2024
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3 participants