FIFO reservation station #2588
tilkmain.yml
on: pull_request
Synthesize full core
31s
Build regression tests (riscv-tests)
48s
Build regression tests (riscv-arch-test)
43s
Run unit tests
6m 46s
Check code formatting and typing
37s
Run regression tests (riscv-tests)
4m 1s
Run regression tests (riscv-arch-test)
11m 51s
Artifacts
Produced during runtime
| Name | Size | |
|---|---|---|
|
verilog-full-core
Expired
|
359 KB |
|