FIFO reservation station #2551
main.yml
on: pull_request
Synthesize full core
31s
Build regression tests (riscv-tests)
42s
Build regression tests (riscv-arch-test)
44s
Run unit tests
5m 18s
Check code formatting and typing
41s
Run regression tests (riscv-tests)
3m 52s
Run regression tests (riscv-arch-test)
11m 55s
Artifacts
Produced during runtime
Name | Size | |
---|---|---|
verilog-full-core
Expired
|
323 KB |
|