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Optimize mul_add for rvv(performance boost 15% ~ 32%)
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zhangyang2057 committed Sep 13, 2024
1 parent 7f3bbff commit 3371dd2
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Showing 2 changed files with 23 additions and 2 deletions.
21 changes: 21 additions & 0 deletions src/Native/include/nncase/ntt/arch/riscv64/primitive_ops.h
Original file line number Diff line number Diff line change
Expand Up @@ -969,6 +969,7 @@ REGISTER_RVV_KERNEL(INNER_PRODUCT_FLOAT32)
REGISTER_RVV_INNER_PRODUCT_OP(float, inner_product_float32)

// register mul_add kernel
#if 0
#define MUL_ADD_FLOAT32(lmul, mlen) \
inline vfloat32m##lmul##_t mul_add_float32( \
const vfloat32m##lmul##_t &v1, const vfloat32m##lmul##_t &v2, \
Expand All @@ -987,6 +988,26 @@ REGISTER_RVV_INNER_PRODUCT_OP(float, inner_product_float32)
const vfloat32m##lmul##_t &v3, const size_t vl) { \
return __riscv_vfmadd_vf_f32m##lmul(v2, s1, v3, vl); \
}
#else
#define MUL_ADD_FLOAT32(lmul, mlen) \
inline vfloat32m##lmul##_t mul_add_float32( \
const vfloat32m##lmul##_t &v1, const vfloat32m##lmul##_t &v2, \
const vfloat32m##lmul##_t &v3, const size_t vl) { \
return __riscv_vfmacc_vv_f32m##lmul(v3, v1, v2, vl); \
} \
\
inline vfloat32m##lmul##_t mul_add_float32( \
const vfloat32m##lmul##_t &v1, const float &s2, \
const vfloat32m##lmul##_t &v3, const size_t vl) { \
return __riscv_vfmacc_vf_f32m##lmul(v3, s2, v1, vl); \
} \
\
inline vfloat32m##lmul##_t mul_add_float32( \
const float &s1, const vfloat32m##lmul##_t &v2, \
const vfloat32m##lmul##_t &v3, const size_t vl) { \
return __riscv_vfmacc_vf_f32m##lmul(v3, s1, v2, vl); \
}
#endif

REGISTER_RVV_KERNEL(MUL_ADD_FLOAT32)

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4 changes: 2 additions & 2 deletions src/Native/test/benchmark_test/benchmark_ntt.py
Original file line number Diff line number Diff line change
Expand Up @@ -224,8 +224,8 @@ def __init__(self, target: str, bin_path: str):
'tanh': '197',
},
'matmul': {'no_pack': '92058',
'pack_K': '155648',
'pack_M': '75674',
'pack_K': '163840',
'pack_M': '76170',
'pack_N': '92058',
'pack_M_N': '47322',
'pack_M_K': '95744',
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