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## This file is used by NFC NXP NCI HAL(external/libnfc-nci/halimpl/pn547) | ||
## and NFC Service Java Native Interface Extensions (packages/apps/Nfc/nci/jni/extns/pn547) | ||
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############################################################################### | ||
# Application options | ||
# Logging Levels | ||
# NXPLOG_DEFAULT_LOGLEVEL 0x01 | ||
# ANDROID_LOG_DEBUG 0x03 | ||
# ANDROID_LOG_WARN 0x02 | ||
# ANDROID_LOG_ERROR 0x01 | ||
# ANDROID_LOG_SILENT 0x00 | ||
# | ||
NXPLOG_EXTNS_LOGLEVEL=0x03 | ||
NXPLOG_NCIHAL_LOGLEVEL=0x03 | ||
NXPLOG_NCIX_LOGLEVEL=0x03 | ||
NXPLOG_NCIR_LOGLEVEL=0x03 | ||
NXPLOG_FWDNLD_LOGLEVEL=0x03 | ||
NXPLOG_TML_LOGLEVEL=0x03 | ||
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############################################################################### | ||
# Extension for Mifare reader enable | ||
# 0x00 - Disabled | ||
# 0x01 - Enabled | ||
MIFARE_READER_ENABLE=0x01 | ||
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############################################################################### | ||
# File location for Firmware | ||
#FW_STORAGE="/vendor/firmware/libpn547_fw.so" | ||
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############################################################################### | ||
# System clock source selection configuration | ||
# CLK_SRC_XTAL - 0x01 | ||
# CLK_SRC_PLL - 0x02 | ||
NXP_SYS_CLK_SRC_SEL=0x02 | ||
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############################################################################### | ||
# System clock frequency selection configuration for PLL | ||
# CLK_FREQ_13MHZ - 0x01 | ||
# CLK_FREQ_19_2MHZ - 0x02 | ||
# CLK_FREQ_24MHZ - 0x03 | ||
# CLK_FREQ_26MHZ - 0x04 | ||
# CLK_FREQ_38_4MHZ - 0x05 | ||
# CLK_FREQ_52MHZ - 0x06 | ||
NXP_SYS_CLK_FREQ_SEL=0x02 | ||
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############################################################################### | ||
# The timeout value to be used for clock request acknowledgment | ||
# min value = 0x01 to max = 0x0A | ||
NXP_SYS_CLOCK_TO_CFG=0x02 | ||
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############################################################################### | ||
# NXP proprietary settings | ||
NXP_ACT_PROP_EXTN={2F, 02, 00} | ||
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############################################################################### | ||
# NFC forum profile settings | ||
NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00} | ||
############################################################################### | ||
# Standby enable settings | ||
# 0x00 - Disabled | ||
# 0x01 - Enabled | ||
NXP_CORE_STANDBY={2F, 00, 01, 01} | ||
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############################################################################### | ||
# NXP RF configuration settings for ALM/PLM settings | ||
NXP_RF_CONF_BLK_1={ | ||
20, 02, F7, 21, | ||
A0, 0E, 01, 01, | ||
A0, 0D, 03, 00, 40, 04, | ||
A0, 0D, 03, 04, 43, 20, | ||
A0, 0D, 03, 04, FF, 05, | ||
A0, 0D, 06, 06, 44, A3, 90, 03, 00, | ||
A0, 0D, 06, 06, 30, CF, 00, 08, 00, | ||
A0, 0D, 06, 06, 2F, 8F, 05, 80, 0C, | ||
A0, 0D, 04, 06, 03, 00, 6E, | ||
A0, 0D, 03, 06, 48, 1A, | ||
A0, 0D, 03, 06, 43, A0, | ||
A0, 0D, 06, 06, 42, 00, 00, F6, FA, | ||
A0, 0D, 06, 06, 41, 80, 00, 00, 00, | ||
A0, 0D, 03, 06, 37, 18, | ||
A0, 0D, 03, 06, 16, 00, | ||
A0, 0D, 03, 06, 15, 00, | ||
A0, 0D, 06, 06, FF, 05, 00, 00, 00, | ||
A0, 0D, 06, 08, 44, 00, 00, 00, 00, | ||
A0, 0D, 06, 20, 4A, 00, 00, 00, 00, | ||
A0, 0D, 06, 20, 42, 88, 10, FF, FF, | ||
A0, 0D, 03, 20, 16, 00, | ||
A0, 0D, 03, 20, 15, 00, | ||
A0, 0D, 06, 22, 44, 22, 00, 02, 00, | ||
A0, 0D, 06, 22, 2D, 50, 44, 0C, 00, | ||
A0, 0D, 04, 32, 03, 40, 3D, | ||
A0, 0D, 06, 32, 42, 00, 00, FF, FF, | ||
A0, 0D, 03, 32, 16, 00, | ||
A0, 0D, 03, 32, 15, 01, | ||
A0, 0D, 03, 32, 0D, 22, | ||
A0, 0D, 03, 32, 14, 22, | ||
A0, 0D, 06, 32, 4A, 30, 0F, 01, 1F, | ||
A0, 0D, 06, 34, 2D, 24, 77, 0C, 00, | ||
A0, 0D, 06, 34, 44, 21, 00, 02, 00, | ||
A0, 0D, 06, 35, 44, 21, 00, 02, 00 | ||
} | ||
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NXP_RF_CONF_BLK_2={ | ||
20, 02, F4, 1F, | ||
A0, 0D, 06, 38, 4A, 53, 07, 01, 1B, | ||
A0, 0D, 06, 38, 42, 68, 10, FF, FF, | ||
A0, 0D, 03, 38, 16, 00, | ||
A0, 0D, 03, 38, 15, 00, | ||
A0, 0D, 06, 3A, 2D, 15, 47, 0D, 00, | ||
A0, 0D, 06, 3C, 4A, 52, 07, 01, 1B, | ||
A0, 0D, 06, 3C, 42, 68, 10, FF, FF, | ||
A0, 0D, 03, 3C, 16, 00, | ||
A0, 0D, 03, 3C, 15, 00, | ||
A0, 0D, 06, 3E, 2D, 15, 47, 0D, 00, | ||
A0, 0D, 06, 40, 42, F0, 10, FF, FF, | ||
A0, 0D, 03, 40, 0D, 02, | ||
A0, 0D, 03, 40, 14, 02, | ||
A0, 0D, 06, 40, 4A, 12, 07, 00, 00, | ||
A0, 0D, 03, 40, 16, 00, | ||
A0, 0D, 03, 40, 15, 00, | ||
A0, 0D, 06, 42, 2D, 15, 47, 0D, 00, | ||
A0, 0D, 06, 46, 44, 21, 00, 02, 00, | ||
A0, 0D, 06, 46, 2D, 05, 47, 0E, 00, | ||
A0, 0D, 06, 44, 4A, 33, 07, 01, 07, | ||
A0, 0D, 06, 44, 42, 88, 10, FF, FF, | ||
A0, 0D, 03, 44, 16, 00, | ||
A0, 0D, 03, 44, 15, 00, | ||
A0, 0D, 06, 4A, 44, 22, 00, 02, 00, | ||
A0, 0D, 06, 4A, 2D, 05, 37, 0C, 00, | ||
A0, 0D, 06, 48, 4A, 33, 07, 01, 07, | ||
A0, 0D, 06, 48, 42, 88, 10, FF, FF, | ||
A0, 0D, 03, 48, 16, 00, | ||
A0, 0D, 03, 48, 15, 00, | ||
A0, 0D, 06, 4E, 44, 22, 00, 02, 00, | ||
A0, 0D, 06, 4E, 2D, 05, 37, 0C, 00 | ||
} | ||
NXP_RF_CONF_BLK_3={ | ||
20, 02, F7, 1E, | ||
A0, 0D, 06, 4C, 4A, 33, 07, 01, 07, | ||
A0, 0D, 06, 4C, 42, 88, 10, FF, FF, | ||
A0, 0D, 03, 4C, 16, 00, | ||
A0, 0D, 03, 4C, 15, 00, | ||
A0, 0D, 06, 52, 44, 22, 00, 02, 00, | ||
A0, 0D, 06, 52, 2D, 05, 25, 0C, 00, | ||
A0, 0D, 06, 50, 42, 90, 10, FF, FF, | ||
A0, 0D, 06, 50, 4A, 11, 0F, 01, 07, | ||
A0, 0D, 03, 50, 16, 00, | ||
A0, 0D, 03, 50, 15, 00, | ||
A0, 0D, 06, 56, 2D, 05, 9E, 0C, 00, | ||
A0, 0D, 06, 56, 44, 22, 00, 02, 00, | ||
A0, 0D, 06, 5C, 2D, 05, 69, 0C, 00, | ||
A0, 0D, 06, 5C, 44, 21, 00, 02, 00, | ||
A0, 0D, 06, 54, 42, 88, 10, FF, FF, | ||
A0, 0D, 06, 54, 4A, 33, 07, 01, 07, | ||
A0, 0D, 03, 54, 16, 00, | ||
A0, 0D, 03, 54, 15, 00, | ||
A0, 0D, 06, 5A, 42, 90, 10, FF, FF, | ||
A0, 0D, 06, 5A, 4A, 31, 07, 01, 07, | ||
A0, 0D, 03, 5A, 16, 00, | ||
A0, 0D, 03, 5A, 15, 00, | ||
A0, 0D, 06, 98, 2F, AF, 05, 80, 0F, | ||
A0, 0D, 06, 9A, 42, 00, 00, FF, FF, | ||
A0, 0D, 06, 30, 44, A3, 90, 03, 00, | ||
A0, 0D, 06, 6C, 44, A3, 90, 03, 00, | ||
A0, 0D, 06, 6C, 30, CF, 00, 08, 00, | ||
A0, 0D, 06, 6C, 2F, 8F, 05, 80, 0C, | ||
A0, 0D, 06, 70, 2F, 8F, 05, 80, 12, | ||
A0, 0D, 06, 70, 30, CF, 00, 08, 00 | ||
} | ||
NXP_RF_CONF_BLK_4={ | ||
20, 02, F7, 1E, | ||
A0, 0D, 06, 74, 2F, 8F, 05, 80, 12, | ||
A0, 0D, 06, 74, 30, DF, 00, 07, 00, | ||
A0, 0D, 06, 78, 2F, 1F, 06, 80, 01, | ||
A0, 0D, 06, 78, 30, 3F, 00, 04, 00, | ||
A0, 0D, 06, 78, 44, A2, 90, 03, 00, | ||
A0, 0D, 03, 78, 47, 00, | ||
A0, 0D, 06, 7C, 2F, AF, 05, 80, 0F, | ||
A0, 0D, 06, 7C, 30, CF, 00, 07, 00, | ||
A0, 0D, 06, 7C, 44, A3, 90, 03, 00, | ||
A0, 0D, 06, 7D, 30, CF, 00, 08, 00, | ||
A0, 0D, 06, 80, 2F, AF, 05, 80, 90, | ||
A0, 0D, 06, 80, 44, A3, 90, 03, 00, | ||
A0, 0D, 06, 84, 2F, AF, 05, 80, 92, | ||
A0, 0D, 06, 84, 44, A3, 90, 03, 00, | ||
A0, 0D, 06, 88, 2F, 7F, 04, 80, 10, | ||
A0, 0D, 06, 88, 30, 5F, 00, 16, 00, | ||
A0, 0D, 03, 88, 47, 00, | ||
A0, 0D, 06, 88, 44, A1, 90, 03, 00, | ||
A0, 0D, 03, 0C, 48, 1A, | ||
A0, 0D, 03, 10, 43, 20, | ||
A0, 0D, 06, 6A, 42, F8, 10, FF, FF, | ||
A0, 0D, 03, 6A, 16, 00, | ||
A0, 0D, 03, 6A, 15, 01, | ||
A0, 0D, 06, 6A, 4A, 30, 0F, 01, 1F, | ||
A0, 0D, 06, 8C, 42, 88, 10, FF, FF, | ||
A0, 0D, 06, 8C, 4A, 33, 07, 01, 07, | ||
A0, 0D, 03, 8C, 16, 00, | ||
A0, 0D, 03, 8C, 15, 00, | ||
A0, 0D, 06, 92, 42, 90, 10, FF, FF, | ||
A0, 0D, 06, 92, 4A, 31, 07, 01, 07 | ||
} | ||
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############################################################################### | ||
# Core configuration extensions | ||
# It includes | ||
# A002 - Clock Request | ||
# 0x00 - Disabled | ||
# 0x01 - Enabled | ||
# A003 - Clock Selection | ||
# Please refer to User Manual | ||
# A004 - Clock Time Out | ||
# Defined in ms | ||
# A00E - Load Modulation Mode | ||
# 0x00 - PLM | ||
# 0x01 - ALM | ||
# A012 - SWP interface 2 configuration | ||
# 0x00 - SWP | ||
# 0x02 - DWP | ||
# Please refer to User Manual | ||
# A040-A043 - Ultra Low Power Tag Detector | ||
# Please refer to Application Note of ULPTD | ||
# A05E - Jewel Reader | ||
# Please refer to User Manual | ||
# A0CD - SWP S1 line behavior | ||
# Defined S1 High time out during Activation sequence | ||
# A0EC - SWP1 interface | ||
# 0x00 - Disabled | ||
# 0x01 - Enabled | ||
# A0ED - SWP2 interface | ||
# 0x00 - Disabled | ||
# 0x01 - Enabled | ||
NXP_CORE_CONF_EXTN_PM={20, 02, 30, 0B, | ||
A0, 02, 01, 01, | ||
A0, 03, 01, 11, | ||
A0, 04, 01, 02, | ||
A0, 06, 01, 01, | ||
A0, 11, 04, CD, 67, 22, 01, | ||
A0, 5E, 01, 01, | ||
A0, CD, 01, 0F, | ||
A0, EC, 01, 01, | ||
A0, ED, 01, 00, | ||
A0, CB, 01, 78, | ||
A0, CE, 01, 7F | ||
} | ||
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NXP_CORE_CONF_EXTN_XTAL={20, 02, 30, 0B, | ||
A0, 02, 01, 00, | ||
A0, 03, 01, 08, | ||
A0, 04, 01, 02, | ||
A0, 06, 01, 01, | ||
A0, 11, 04, 14, 0B, B8, 14, | ||
A0, 5E, 01, 01, | ||
A0, CD, 01, 0F, | ||
A0, EC, 01, 01, | ||
A0, ED, 01, 00, | ||
A0, CB, 01, 78, | ||
A0, CE, 01, 7F | ||
} | ||
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NXP_CORE_CONF_EXTN={20, 02, 2C, 0A, | ||
A0, 02, 01, 01, | ||
A0, 03, 01, 11, | ||
A0, 04, 01, 02, | ||
A0, 11, 04, CD, 67, 22, 01, | ||
A0, 5E, 01, 01, | ||
A0, CD, 01, 0F, | ||
A0, EC, 01, 01, | ||
A0, ED, 01, 00, | ||
A0, CB, 01, 78, | ||
A0, CE, 01, 7F | ||
} | ||
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############################################################################### | ||
# apply Low Power Polling(LPM) Algorithm, detecting RF field using short-term single carrier | ||
# NORMAL Polling : {20, 02, 11, 04, A0, 40, 01, 00, A0, 41, 01, 04, A0, 42, 01, 19, A0, 43, 01, 50} | ||
# LPM Polling : {20, 02, 11, 04, A0, 40, 01, 01, A0, 41, 01, 04, A0, 42, 01, 19, A0, 43, 01, 00} | ||
# HYBRID Polling : {20, 02, 11, 04, A0, 40, 01, 01, A0, 41, 01, 04, A0, 42, 01, 19, A0, 43, 01, 04} | ||
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NXP_POLLING_MODE={20, 02, 11, 04, | ||
A0, 40, 01, 01, | ||
A0, 41, 01, 04, | ||
A0, 42, 01, 19, | ||
A0, 43, 01, 04 | ||
} | ||
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############################################################################### | ||
# Core configuration settings | ||
NXP_CORE_CONF={ 20, 02, 2B, 0D, | ||
18, 01, 01, | ||
21, 01, 00, | ||
28, 01, 00, | ||
30, 01, 08, | ||
31, 01, 03, | ||
33, 04, 01, 02, 03, 04, | ||
50, 01, 02, | ||
54, 01, 06, | ||
5B, 01, 02, | ||
60, 01, 0E, | ||
80, 01, 01, | ||
81, 01, 01, | ||
82, 01, 0E | ||
} | ||
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############################################################################### | ||
# Mifare Classic Key settings | ||
#NXP_CORE_MFCKEY_SETTING={20, 02, 25,04, A0, 51, 06, A0, A1, A2, A3, A4, A5, | ||
# A0, 52, 06, D3, F7, D3, F7, D3, F7, | ||
# A0, 53, 06, FF, FF, FF, FF, FF, FF, | ||
# A0, 54, 06, 00, 00, 00, 00, 00, 00} | ||
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############################################################################### | ||
# Default SE Options | ||
# No secure element 0x00 | ||
# eSE 0x01 | ||
# UICC 0x02 | ||
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NXP_DEFAULT_SE=0x02 | ||
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############################################################################### | ||
NXP_DEFAULT_NFCEE_TIMEOUT=0x06 | ||
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############################################################################### | ||
#Enable SWP full power mode when phone is power off | ||
NXP_SWP_FULL_PWR_ON=0x00 | ||
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############################################################################### | ||
#Chip type | ||
#PN547C2 0x01 | ||
#PN65T 0x02 | ||
NXP_NFC_CHIP=0x01 | ||
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############################################################################### | ||
#SWP Reader feature | ||
#Timeout in seconds | ||
NXP_SWP_RD_START_TIMEOUT=0x0A | ||
#Timeout in seconds | ||
NXP_SWP_RD_TAG_OP_TIMEOUT=0x01 |
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