This is a fork of a project at the HAW Hamburg. It includes a RISC-V compliant processor written in VHDL. It's compact size allows it to be used in a variety of use cases from low power to high speed requirements. In the scope of this project, only the RV32I instruction set was implemented.
Documentation can be found in /doc with a quick start guide for the Zedboard with Xilinx Zynq SoC (/doc/design_documentation/Instruction_Usage.pdf).